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spi: spi-rockchip: cleanup use struct spi_controller 

Cleanup, move from the compatibily layer struct spi_master over
to struct spi_controller, and rename the related function calls.

Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
Link: https://lore.kernel.org/r/20200511083022.23678-2-chris.ruehl@gtsys.com.hk
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Chris Ruehl 2020-05-11 16:30:20 +08:00 committed by Mark Brown
parent afb7f56524
commit d66571a20f
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
1 changed files with 89 additions and 89 deletions
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178
drivers/spi/spi-rockchip.c
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@ -219,8 +219,8 @@ static u32 get_fifo_len(struct rockchip_spi *rs)
static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
{ {
struct spi_master *master = spi->master; struct spi_controller *ctlr = spi->controller;
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
bool cs_asserted = !enable; bool cs_asserted = !enable;
/* Return immediately for no-op */ /* Return immediately for no-op */
@ -244,10 +244,10 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
rs->cs_asserted[spi->chip_select] = cs_asserted; rs->cs_asserted[spi->chip_select] = cs_asserted;
} }
static void rockchip_spi_handle_err(struct spi_master *master, static void rockchip_spi_handle_err(struct spi_controller *ctlr,
struct spi_message *msg) struct spi_message *msg)
{ {
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
/* stop running spi transfer /* stop running spi transfer
* this also flushes both rx and tx fifos * this also flushes both rx and tx fifos
@ -258,10 +258,10 @@ static void rockchip_spi_handle_err(struct spi_master *master,
writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
if (atomic_read(&rs->state) & TXDMA) if (atomic_read(&rs->state) & TXDMA)
dmaengine_terminate_async(master->dma_tx); dmaengine_terminate_async(ctlr->dma_tx);
if (atomic_read(&rs->state) & RXDMA) if (atomic_read(&rs->state) & RXDMA)
dmaengine_terminate_async(master->dma_rx); dmaengine_terminate_async(ctlr->dma_rx);
} }
static void rockchip_spi_pio_writer(struct rockchip_spi *rs) static void rockchip_spi_pio_writer(struct rockchip_spi *rs)
@ -319,8 +319,8 @@ static void rockchip_spi_pio_reader(struct rockchip_spi *rs)
static irqreturn_t rockchip_spi_isr(int irq, void *dev_id) static irqreturn_t rockchip_spi_isr(int irq, void *dev_id)
{ {
struct spi_master *master = dev_id; struct spi_controller *ctlr = dev_id;
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
if (rs->tx_left) if (rs->tx_left)
rockchip_spi_pio_writer(rs); rockchip_spi_pio_writer(rs);
@ -329,7 +329,7 @@ static irqreturn_t rockchip_spi_isr(int irq, void *dev_id)
if (!rs->rx_left) { if (!rs->rx_left) {
spi_enable_chip(rs, false); spi_enable_chip(rs, false);
writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
spi_finalize_current_transfer(master); spi_finalize_current_transfer(ctlr);
} }
return IRQ_HANDLED; return IRQ_HANDLED;
@ -355,21 +355,21 @@ static int rockchip_spi_prepare_irq(struct rockchip_spi *rs,
static void rockchip_spi_dma_rxcb(void *data) static void rockchip_spi_dma_rxcb(void *data)
{ {
struct spi_master *master = data; struct spi_controller *ctlr = data;
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
int state = atomic_fetch_andnot(RXDMA, &rs->state); int state = atomic_fetch_andnot(RXDMA, &rs->state);
if (state & TXDMA) if (state & TXDMA)
return; return;
spi_enable_chip(rs, false); spi_enable_chip(rs, false);
spi_finalize_current_transfer(master); spi_finalize_current_transfer(ctlr);
} }
static void rockchip_spi_dma_txcb(void *data) static void rockchip_spi_dma_txcb(void *data)
{ {
struct spi_master *master = data; struct spi_controller *ctlr = data;
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
int state = atomic_fetch_andnot(TXDMA, &rs->state); int state = atomic_fetch_andnot(TXDMA, &rs->state);
if (state & RXDMA) if (state & RXDMA)
@ -379,11 +379,11 @@ static void rockchip_spi_dma_txcb(void *data)
wait_for_idle(rs); wait_for_idle(rs);
spi_enable_chip(rs, false); spi_enable_chip(rs, false);
spi_finalize_current_transfer(master); spi_finalize_current_transfer(ctlr);
} }
static int rockchip_spi_prepare_dma(struct rockchip_spi *rs, static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
struct spi_master *master, struct spi_transfer *xfer) struct spi_controller *ctlr, struct spi_transfer *xfer)
{ {
struct dma_async_tx_descriptor *rxdesc, *txdesc; struct dma_async_tx_descriptor *rxdesc, *txdesc;
@ -398,17 +398,17 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
.src_maxburst = 1, .src_maxburst = 1,
}; };
dmaengine_slave_config(master->dma_rx, &rxconf); dmaengine_slave_config(ctlr->dma_rx, &rxconf);
rxdesc = dmaengine_prep_slave_sg( rxdesc = dmaengine_prep_slave_sg(
master->dma_rx, ctlr->dma_rx,
xfer->rx_sg.sgl, xfer->rx_sg.nents, xfer->rx_sg.sgl, xfer->rx_sg.nents,
DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT); DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT);
if (!rxdesc) if (!rxdesc)
return -EINVAL; return -EINVAL;
rxdesc->callback = rockchip_spi_dma_rxcb; rxdesc->callback = rockchip_spi_dma_rxcb;
rxdesc->callback_param = master; rxdesc->callback_param = ctlr;
} }
txdesc = NULL; txdesc = NULL;
@ -420,27 +420,27 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
.dst_maxburst = rs->fifo_len / 4, .dst_maxburst = rs->fifo_len / 4,
}; };
dmaengine_slave_config(master->dma_tx, &txconf); dmaengine_slave_config(ctlr->dma_tx, &txconf);
txdesc = dmaengine_prep_slave_sg( txdesc = dmaengine_prep_slave_sg(
master->dma_tx, ctlr->dma_tx,
xfer->tx_sg.sgl, xfer->tx_sg.nents, xfer->tx_sg.sgl, xfer->tx_sg.nents,
DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT); DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT);
if (!txdesc) { if (!txdesc) {
if (rxdesc) if (rxdesc)
dmaengine_terminate_sync(master->dma_rx); dmaengine_terminate_sync(ctlr->dma_rx);
return -EINVAL; return -EINVAL;
} }
txdesc->callback = rockchip_spi_dma_txcb; txdesc->callback = rockchip_spi_dma_txcb;
txdesc->callback_param = master; txdesc->callback_param = ctlr;
} }
/* rx must be started before tx due to spi instinct */ /* rx must be started before tx due to spi instinct */
if (rxdesc) { if (rxdesc) {
atomic_or(RXDMA, &rs->state); atomic_or(RXDMA, &rs->state);
dmaengine_submit(rxdesc); dmaengine_submit(rxdesc);
dma_async_issue_pending(master->dma_rx); dma_async_issue_pending(ctlr->dma_rx);
} }
spi_enable_chip(rs, true); spi_enable_chip(rs, true);
@ -448,7 +448,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
if (txdesc) { if (txdesc) {
atomic_or(TXDMA, &rs->state); atomic_or(TXDMA, &rs->state);
dmaengine_submit(txdesc); dmaengine_submit(txdesc);
dma_async_issue_pending(master->dma_tx); dma_async_issue_pending(ctlr->dma_tx);
} }
/* 1 means the transfer is in progress */ /* 1 means the transfer is in progress */
@ -493,7 +493,7 @@ static void rockchip_spi_config(struct rockchip_spi *rs,
break; break;
default: default:
/* we only whitelist 4, 8 and 16 bit words in /* we only whitelist 4, 8 and 16 bit words in
* master->bits_per_word_mask, so this shouldn't * ctlr->bits_per_word_mask, so this shouldn't
* happen * happen
*/ */
unreachable(); unreachable();
@ -536,11 +536,11 @@ static size_t rockchip_spi_max_transfer_size(struct spi_device *spi)
} }
static int rockchip_spi_transfer_one( static int rockchip_spi_transfer_one(
struct spi_master *master, struct spi_controller *ctlr,
struct spi_device *spi, struct spi_device *spi,
struct spi_transfer *xfer) struct spi_transfer *xfer)
{ {
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
bool use_dma; bool use_dma;
WARN_ON(readl_relaxed(rs->regs + ROCKCHIP_SPI_SSIENR) && WARN_ON(readl_relaxed(rs->regs + ROCKCHIP_SPI_SSIENR) &&
@ -558,21 +558,21 @@ static int rockchip_spi_transfer_one(
rs->n_bytes = xfer->bits_per_word <= 8 ? 1 : 2; rs->n_bytes = xfer->bits_per_word <= 8 ? 1 : 2;
use_dma = master->can_dma ? master->can_dma(master, spi, xfer) : false; use_dma = ctlr->can_dma ? ctlr->can_dma(ctlr, spi, xfer) : false;
rockchip_spi_config(rs, spi, xfer, use_dma); rockchip_spi_config(rs, spi, xfer, use_dma);
if (use_dma) if (use_dma)
return rockchip_spi_prepare_dma(rs, master, xfer); return rockchip_spi_prepare_dma(rs, ctlr, xfer);
return rockchip_spi_prepare_irq(rs, xfer); return rockchip_spi_prepare_irq(rs, xfer);
} }
static bool rockchip_spi_can_dma(struct spi_master *master, static bool rockchip_spi_can_dma(struct spi_controller *ctlr,
struct spi_device *spi, struct spi_device *spi,
struct spi_transfer *xfer) struct spi_transfer *xfer)
{ {
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
unsigned int bytes_per_word = xfer->bits_per_word <= 8 ? 1 : 2; unsigned int bytes_per_word = xfer->bits_per_word <= 8 ? 1 : 2;
/* if the numbor of spi words to transfer is less than the fifo /* if the numbor of spi words to transfer is less than the fifo
@ -586,44 +586,44 @@ static int rockchip_spi_probe(struct platform_device *pdev)
{ {
int ret; int ret;
struct rockchip_spi *rs; struct rockchip_spi *rs;
struct spi_master *master; struct spi_controller *ctlr;
struct resource *mem; struct resource *mem;
u32 rsd_nsecs; u32 rsd_nsecs;
master = spi_alloc_master(&pdev->dev, sizeof(struct rockchip_spi)); ctlr = spi_alloc_master(&pdev->dev, sizeof(struct rockchip_spi));
if (!master) if (!ctlr)
return -ENOMEM; return -ENOMEM;
platform_set_drvdata(pdev, master); platform_set_drvdata(pdev, ctlr);
rs = spi_master_get_devdata(master); rs = spi_controller_get_devdata(ctlr);
/* Get basic io resource and map it */ /* Get basic io resource and map it */
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
rs->regs = devm_ioremap_resource(&pdev->dev, mem); rs->regs = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(rs->regs)) { if (IS_ERR(rs->regs)) {
ret = PTR_ERR(rs->regs); ret = PTR_ERR(rs->regs);
goto err_put_master; goto err_put_ctlr;
} }
rs->apb_pclk = devm_clk_get(&pdev->dev, "apb_pclk"); rs->apb_pclk = devm_clk_get(&pdev->dev, "apb_pclk");
if (IS_ERR(rs->apb_pclk)) { if (IS_ERR(rs->apb_pclk)) {
dev_err(&pdev->dev, "Failed to get apb_pclk\n"); dev_err(&pdev->dev, "Failed to get apb_pclk\n");
ret = PTR_ERR(rs->apb_pclk); ret = PTR_ERR(rs->apb_pclk);
goto err_put_master; goto err_put_ctlr;
} }
rs->spiclk = devm_clk_get(&pdev->dev, "spiclk"); rs->spiclk = devm_clk_get(&pdev->dev, "spiclk");
if (IS_ERR(rs->spiclk)) { if (IS_ERR(rs->spiclk)) {
dev_err(&pdev->dev, "Failed to get spi_pclk\n"); dev_err(&pdev->dev, "Failed to get spi_pclk\n");
ret = PTR_ERR(rs->spiclk); ret = PTR_ERR(rs->spiclk);
goto err_put_master; goto err_put_ctlr;
} }
ret = clk_prepare_enable(rs->apb_pclk); ret = clk_prepare_enable(rs->apb_pclk);
if (ret < 0) { if (ret < 0) {
dev_err(&pdev->dev, "Failed to enable apb_pclk\n"); dev_err(&pdev->dev, "Failed to enable apb_pclk\n");
goto err_put_master; goto err_put_ctlr;
} }
ret = clk_prepare_enable(rs->spiclk); ret = clk_prepare_enable(rs->spiclk);
@ -639,7 +639,7 @@ static int rockchip_spi_probe(struct platform_device *pdev)
goto err_disable_spiclk; goto err_disable_spiclk;
ret = devm_request_threaded_irq(&pdev->dev, ret, rockchip_spi_isr, NULL, ret = devm_request_threaded_irq(&pdev->dev, ret, rockchip_spi_isr, NULL,
IRQF_ONESHOT, dev_name(&pdev->dev), master); IRQF_ONESHOT, dev_name(&pdev->dev), ctlr);
if (ret) if (ret)
goto err_disable_spiclk; goto err_disable_spiclk;
@ -673,78 +673,78 @@ static int rockchip_spi_probe(struct platform_device *pdev)
pm_runtime_set_active(&pdev->dev); pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
master->auto_runtime_pm = true; ctlr->auto_runtime_pm = true;
master->bus_num = pdev->id; ctlr->bus_num = pdev->id;
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST; ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST;
master->num_chipselect = ROCKCHIP_SPI_MAX_CS_NUM; ctlr->num_chipselect = ROCKCHIP_SPI_MAX_CS_NUM;
master->dev.of_node = pdev->dev.of_node; ctlr->dev.of_node = pdev->dev.of_node;
master->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4); ctlr->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8) | SPI_BPW_MASK(4);
master->min_speed_hz = rs->freq / BAUDR_SCKDV_MAX; ctlr->min_speed_hz = rs->freq / BAUDR_SCKDV_MAX;
master->max_speed_hz = min(rs->freq / BAUDR_SCKDV_MIN, MAX_SCLK_OUT); ctlr->max_speed_hz = min(rs->freq / BAUDR_SCKDV_MIN, MAX_SCLK_OUT);
master->set_cs = rockchip_spi_set_cs; ctlr->set_cs = rockchip_spi_set_cs;
master->transfer_one = rockchip_spi_transfer_one; ctlr->transfer_one = rockchip_spi_transfer_one;
master->max_transfer_size = rockchip_spi_max_transfer_size; ctlr->max_transfer_size = rockchip_spi_max_transfer_size;
master->handle_err = rockchip_spi_handle_err; ctlr->handle_err = rockchip_spi_handle_err;
master->flags = SPI_MASTER_GPIO_SS; ctlr->flags = SPI_MASTER_GPIO_SS;
master->dma_tx = dma_request_chan(rs->dev, "tx"); ctlr->dma_tx = dma_request_chan(rs->dev, "tx");
if (IS_ERR(master->dma_tx)) { if (IS_ERR(ctlr->dma_tx)) {
/* Check tx to see if we need defer probing driver */ /* Check tx to see if we need defer probing driver */
if (PTR_ERR(master->dma_tx) == -EPROBE_DEFER) { if (PTR_ERR(ctlr->dma_tx) == -EPROBE_DEFER) {
ret = -EPROBE_DEFER; ret = -EPROBE_DEFER;
goto err_disable_pm_runtime; goto err_disable_pm_runtime;
} }
dev_warn(rs->dev, "Failed to request TX DMA channel\n"); dev_warn(rs->dev, "Failed to request TX DMA channel\n");
master->dma_tx = NULL; ctlr->dma_tx = NULL;
} }
master->dma_rx = dma_request_chan(rs->dev, "rx"); ctlr->dma_rx = dma_request_chan(rs->dev, "rx");
if (IS_ERR(master->dma_rx)) { if (IS_ERR(ctlr->dma_rx)) {
if (PTR_ERR(master->dma_rx) == -EPROBE_DEFER) { if (PTR_ERR(ctlr->dma_rx) == -EPROBE_DEFER) {
ret = -EPROBE_DEFER; ret = -EPROBE_DEFER;
goto err_free_dma_tx; goto err_free_dma_tx;
} }
dev_warn(rs->dev, "Failed to request RX DMA channel\n"); dev_warn(rs->dev, "Failed to request RX DMA channel\n");
master->dma_rx = NULL; ctlr->dma_rx = NULL;
} }
if (master->dma_tx && master->dma_rx) { if (ctlr->dma_tx && ctlr->dma_rx) {
rs->dma_addr_tx = mem->start + ROCKCHIP_SPI_TXDR; rs->dma_addr_tx = mem->start + ROCKCHIP_SPI_TXDR;
rs->dma_addr_rx = mem->start + ROCKCHIP_SPI_RXDR; rs->dma_addr_rx = mem->start + ROCKCHIP_SPI_RXDR;
master->can_dma = rockchip_spi_can_dma; ctlr->can_dma = rockchip_spi_can_dma;
} }
ret = devm_spi_register_master(&pdev->dev, master); ret = devm_spi_register_controller(&pdev->dev, ctlr);
if (ret < 0) { if (ret < 0) {
dev_err(&pdev->dev, "Failed to register master\n"); dev_err(&pdev->dev, "Failed to register controller\n");
goto err_free_dma_rx; goto err_free_dma_rx;
} }
return 0; return 0;
err_free_dma_rx: err_free_dma_rx:
if (master->dma_rx) if (ctlr->dma_rx)
dma_release_channel(master->dma_rx); dma_release_channel(ctlr->dma_rx);
err_free_dma_tx: err_free_dma_tx:
if (master->dma_tx) if (ctlr->dma_tx)
dma_release_channel(master->dma_tx); dma_release_channel(ctlr->dma_tx);
err_disable_pm_runtime: err_disable_pm_runtime:
pm_runtime_disable(&pdev->dev); pm_runtime_disable(&pdev->dev);
err_disable_spiclk: err_disable_spiclk:
clk_disable_unprepare(rs->spiclk); clk_disable_unprepare(rs->spiclk);
err_disable_apbclk: err_disable_apbclk:
clk_disable_unprepare(rs->apb_pclk); clk_disable_unprepare(rs->apb_pclk);
err_put_master: err_put_ctlr:
spi_master_put(master); spi_controller_put(ctlr);
return ret; return ret;
} }
static int rockchip_spi_remove(struct platform_device *pdev) static int rockchip_spi_remove(struct platform_device *pdev)
{ {
struct spi_master *master = spi_master_get(platform_get_drvdata(pdev)); struct spi_controller *ctlr = spi_controller_get(platform_get_drvdata(pdev));
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
pm_runtime_get_sync(&pdev->dev); pm_runtime_get_sync(&pdev->dev);
@ -755,12 +755,12 @@ static int rockchip_spi_remove(struct platform_device *pdev)
pm_runtime_disable(&pdev->dev); pm_runtime_disable(&pdev->dev);
pm_runtime_set_suspended(&pdev->dev); pm_runtime_set_suspended(&pdev->dev);
if (master->dma_tx) if (ctlr->dma_tx)
dma_release_channel(master->dma_tx); dma_release_channel(ctlr->dma_tx);
if (master->dma_rx) if (ctlr->dma_rx)
dma_release_channel(master->dma_rx); dma_release_channel(ctlr->dma_rx);
spi_master_put(master); spi_controller_put(ctlr);
return 0; return 0;
} }
@ -769,9 +769,9 @@ static int rockchip_spi_remove(struct platform_device *pdev)
static int rockchip_spi_suspend(struct device *dev) static int rockchip_spi_suspend(struct device *dev)
{ {
int ret; int ret;
struct spi_master *master = dev_get_drvdata(dev); struct spi_controller *ctlr = dev_get_drvdata(dev);
ret = spi_master_suspend(master); ret = spi_controller_suspend(ctlr);
if (ret < 0) if (ret < 0)
return ret; return ret;
@ -787,8 +787,8 @@ static int rockchip_spi_suspend(struct device *dev)
static int rockchip_spi_resume(struct device *dev) static int rockchip_spi_resume(struct device *dev)
{ {
int ret; int ret;
struct spi_master *master = dev_get_drvdata(dev); struct spi_controller *ctlr = dev_get_drvdata(dev);
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
pinctrl_pm_select_default_state(dev); pinctrl_pm_select_default_state(dev);
@ -796,7 +796,7 @@ static int rockchip_spi_resume(struct device *dev)
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = spi_master_resume(master); ret = spi_controller_resume(ctlr);
if (ret < 0) { if (ret < 0) {
clk_disable_unprepare(rs->spiclk); clk_disable_unprepare(rs->spiclk);
clk_disable_unprepare(rs->apb_pclk); clk_disable_unprepare(rs->apb_pclk);
@ -809,8 +809,8 @@ static int rockchip_spi_resume(struct device *dev)
#ifdef CONFIG_PM #ifdef CONFIG_PM
static int rockchip_spi_runtime_suspend(struct device *dev) static int rockchip_spi_runtime_suspend(struct device *dev)
{ {
struct spi_master *master = dev_get_drvdata(dev); struct spi_controller *ctlr = dev_get_drvdata(dev);
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
clk_disable_unprepare(rs->spiclk); clk_disable_unprepare(rs->spiclk);
clk_disable_unprepare(rs->apb_pclk); clk_disable_unprepare(rs->apb_pclk);
@ -821,8 +821,8 @@ static int rockchip_spi_runtime_suspend(struct device *dev)
static int rockchip_spi_runtime_resume(struct device *dev) static int rockchip_spi_runtime_resume(struct device *dev)
{ {
int ret; int ret;
struct spi_master *master = dev_get_drvdata(dev); struct spi_controller *ctlr = dev_get_drvdata(dev);
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
ret = clk_prepare_enable(rs->apb_pclk); ret = clk_prepare_enable(rs->apb_pclk);
if (ret < 0) if (ret < 0)