mirror of https://gitee.com/openkylin/linux.git
usb:hsotg:samsung: Remove platform dependent functions from s3c-hsotg
Two functions - namely: s3c_hsotg_gate and s3c_hsotg_otgreset are platform dependent and therefore removed from Samsung's generic s3c-hsotg code. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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@ -36,8 +36,6 @@
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#include <plat/regs-usb-hsotg-phy.h>
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#include "s3c-hsotg.h"
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#include <linux/platform_data/s3c-hsotg.h>
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#include <mach/regs-sys.h>
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#include <plat/cpu.h>
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#define DMA_ADDR_INVALID (~((dma_addr_t)0))
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@ -2846,51 +2844,6 @@ static void __devinit s3c_hsotg_initep(struct s3c_hsotg *hsotg,
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}
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}
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/**
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* s3c_hsotg_otgreset - reset the OtG phy block
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* @hsotg: The host state.
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*
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* Power up the phy, set the basic configuration and start the PHY.
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*/
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static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)
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{
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struct clk *xusbxti;
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u32 pwr, osc;
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pwr = readl(S3C_PHYPWR);
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pwr &= ~0x19;
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writel(pwr, S3C_PHYPWR);
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mdelay(1);
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osc = hsotg->plat->is_osc ? S3C_PHYCLK_EXT_OSC : 0;
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xusbxti = clk_get(hsotg->dev, "xusbxti");
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if (xusbxti && !IS_ERR(xusbxti)) {
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switch (clk_get_rate(xusbxti)) {
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case 12*MHZ:
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osc |= S3C_PHYCLK_CLKSEL_12M;
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break;
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case 24*MHZ:
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osc |= S3C_PHYCLK_CLKSEL_24M;
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break;
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default:
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case 48*MHZ:
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/* default reference clock */
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break;
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}
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clk_put(xusbxti);
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}
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writel(osc | 0x10, S3C_PHYCLK);
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/* issue a full set of resets to the otg and core */
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writel(S3C_RSTCON_PHY, S3C_RSTCON);
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udelay(20); /* at-least 10uS */
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writel(0, S3C_RSTCON);
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}
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static void s3c_hsotg_init(struct s3c_hsotg *hsotg)
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{
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u32 cfg4;
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@ -3263,32 +3216,6 @@ static void __devexit s3c_hsotg_delete_debug(struct s3c_hsotg *hsotg)
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debugfs_remove(hsotg->debug_root);
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}
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/**
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* s3c_hsotg_gate - set the hardware gate for the block
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* @pdev: The device we bound to
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* @on: On or off.
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*
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* Set the hardware gate setting into the block. If we end up on
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* something other than an S3C64XX, then we might need to change this
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* to using a platform data callback, or some other mechanism.
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*/
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static void s3c_hsotg_gate(struct platform_device *pdev, bool on)
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{
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unsigned long flags;
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u32 others;
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local_irq_save(flags);
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others = __raw_readl(S3C64XX_OTHERS);
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if (on)
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others |= S3C64XX_OTHERS_USBMASK;
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else
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others &= ~S3C64XX_OTHERS_USBMASK;
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__raw_writel(others, S3C64XX_OTHERS);
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local_irq_restore(flags);
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}
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static struct s3c_hsotg_plat s3c_hsotg_default_pdata;
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static int __devinit s3c_hsotg_probe(struct platform_device *pdev)
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@ -3390,9 +3317,7 @@ static int __devinit s3c_hsotg_probe(struct platform_device *pdev)
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clk_enable(hsotg->clk);
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s3c_hsotg_gate(pdev, true);
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s3c_hsotg_otgreset(hsotg);
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s3c_hsotg_corereset(hsotg);
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s3c_hsotg_init(hsotg);
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@ -3412,7 +3337,6 @@ static int __devinit s3c_hsotg_probe(struct platform_device *pdev)
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return 0;
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err_add_udc:
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s3c_hsotg_gate(pdev, false);
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clk_disable(hsotg->clk);
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clk_put(hsotg->clk);
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@ -3445,7 +3369,6 @@ static int __devexit s3c_hsotg_remove(struct platform_device *pdev)
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release_resource(hsotg->regs_res);
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kfree(hsotg->regs_res);
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s3c_hsotg_gate(pdev, false);
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clk_disable(hsotg->clk);
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clk_put(hsotg->clk);
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