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ARM: tegra: Whitespace clean-up for Tegra20/30/124 

There were a few cases of eight spaces being used instead of a tab
character plus one case of using two spaces after an equal sign instead
of just one which this patch fixes.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Marcel Ziswiler 2015-08-27 11:44:48 +02:00 committed by Thierry Reding
parent 9a0baee960
commit d8b316b250
3 changed files with 8 additions and 8 deletions
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2
arch/arm/boot/dts/tegra124.dtsi
View File

@ -636,7 +636,7 @@ hda@0,70030000 {
reg = <0x0 0x70030000 0x0 0x10000>; reg = <0x0 0x70030000 0x0 0x10000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_HDA>, clocks = <&tegra_car TEGRA124_CLK_HDA>,
<&tegra_car TEGRA124_CLK_HDA2HDMI>, <&tegra_car TEGRA124_CLK_HDA2HDMI>,
<&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>;
clock-names = "hda", "hda2hdmi", "hda2codec_2x"; clock-names = "hda", "hda2hdmi", "hda2codec_2x";
resets = <&tegra_car 125>, /* hda */ resets = <&tegra_car 125>, /* hda */

4
arch/arm/boot/dts/tegra20.dtsi
View File

@ -601,8 +601,8 @@ pcie-controller@80003000 {
<&tegra_car TEGRA20_CLK_PLL_E>; <&tegra_car TEGRA20_CLK_PLL_E>;
clock-names = "pex", "afi", "pll_e"; clock-names = "pex", "afi", "pll_e";
resets = <&tegra_car 70>, resets = <&tegra_car 70>,
<&tegra_car 72>, <&tegra_car 72>,
<&tegra_car 74>; <&tegra_car 74>;
reset-names = "pex", "afi", "pcie_x"; reset-names = "pex", "afi", "pcie_x";
status = "disabled"; status = "disabled";

10
arch/arm/boot/dts/tegra30.dtsi
View File

@ -42,8 +42,8 @@ pcie-controller@00003000 {
<&tegra_car TEGRA30_CLK_CML0>; <&tegra_car TEGRA30_CLK_CML0>;
clock-names = "pex", "afi", "pll_e", "cml"; clock-names = "pex", "afi", "pll_e", "cml";
resets = <&tegra_car 70>, resets = <&tegra_car 70>,
<&tegra_car 72>, <&tegra_car 72>,
<&tegra_car 74>; <&tegra_car 74>;
reset-names = "pex", "afi", "pcie_x"; reset-names = "pex", "afi", "pcie_x";
status = "disabled"; status = "disabled";
@ -153,7 +153,7 @@ gr3d@54180000 {
&tegra_car TEGRA30_CLK_GR3D2>; &tegra_car TEGRA30_CLK_GR3D2>;
clock-names = "3d", "3d2"; clock-names = "3d", "3d2";
resets = <&tegra_car 24>, resets = <&tegra_car 24>,
<&tegra_car 98>; <&tegra_car 98>;
reset-names = "3d", "3d2"; reset-names = "3d", "3d2";
}; };
@ -455,7 +455,7 @@ rtc@7000e000 {
}; };
i2c@7000c000 { i2c@7000c000 {
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
reg = <0x7000c000 0x100>; reg = <0x7000c000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
@ -660,7 +660,7 @@ hda@70030000 {
reg = <0x70030000 0x10000>; reg = <0x70030000 0x10000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_HDA>, clocks = <&tegra_car TEGRA30_CLK_HDA>,
<&tegra_car TEGRA30_CLK_HDA2HDMI>, <&tegra_car TEGRA30_CLK_HDA2HDMI>,
<&tegra_car TEGRA30_CLK_HDA2CODEC_2X>; <&tegra_car TEGRA30_CLK_HDA2CODEC_2X>;
clock-names = "hda", "hda2hdmi", "hda2codec_2x"; clock-names = "hda", "hda2hdmi", "hda2codec_2x";
resets = <&tegra_car 125>, /* hda */ resets = <&tegra_car 125>, /* hda */