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powerpc/86xx: Add new LAW & MCM device tree nodes for all 86xx systems 

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala 2009-04-27 11:02:16 -05:00
parent 5a928079c9
commit da38578048
7 changed files with 91 additions and 0 deletions
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13
arch/powerpc/boot/dts/gef_ppc9a.dts
View File

@ -167,6 +167,19 @@ soc@fef00000 {
reg = <0xfef00000 0x100000>; // CCSRBAR 1M
bus-frequency = <33333333>;
mcm-law@0 {
compatible = "fsl,mcm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
mcm@1000 {
compatible = "fsl,mpc8641-mcm", "fsl,mcm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
i2c1: i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;

13
arch/powerpc/boot/dts/gef_sbc310.dts
View File

@ -166,6 +166,19 @@ soc@fef00000 {
reg = <0xfef00000 0x100000>; // CCSRBAR 1M
bus-frequency = <33333333>;
mcm-law@0 {
compatible = "fsl,mcm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
mcm@1000 {
compatible = "fsl,mpc8641-mcm", "fsl,mcm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
i2c1: i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;

13
arch/powerpc/boot/dts/gef_sbc610.dts
View File

@ -131,6 +131,19 @@ soc@fef00000 {
reg = <0xfef00000 0x100000>; // CCSRBAR 1M
bus-frequency = <33333333>;
mcm-law@0 {
compatible = "fsl,mcm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
mcm@1000 {
compatible = "fsl,mpc8641-mcm", "fsl,mcm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
i2c1: i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;

13
arch/powerpc/boot/dts/mpc8610_hpcd.dts
View File

@ -115,6 +115,19 @@ soc@e0000000 {
reg = <0xe0000000 0x1000>;
bus-frequency = <0>;
mcm-law@0 {
compatible = "fsl,mcm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
mcm@1000 {
compatible = "fsl,mpc8610-mcm", "fsl,mcm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;

13
arch/powerpc/boot/dts/mpc8641_hpcn.dts
View File

@ -117,6 +117,19 @@ soc8641@ffe00000 {
reg = <0xffe00000 0x00001000>; // CCSRBAR
bus-frequency = <0>;
mcm-law@0 {
compatible = "fsl,mcm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
mcm@1000 {
compatible = "fsl,mpc8641-mcm", "fsl,mcm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;

13
arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts
View File

@ -110,6 +110,19 @@ soc8641@fffe00000 {
reg = <0x0f 0xffe00000 0x0 0x00001000>; // CCSRBAR
bus-frequency = <0>;
mcm-law@0 {
compatible = "fsl,mcm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
mcm@1000 {
compatible = "fsl,mpc8641-mcm", "fsl,mcm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;

13
arch/powerpc/boot/dts/sbc8641d.dts
View File

@ -129,6 +129,19 @@ soc@f8000000 {
reg = <0xf8000000 0x00001000>; // CCSRBAR
bus-frequency = <0>;
mcm-law@0 {
compatible = "fsl,mcm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <10>;
};
mcm@1000 {
compatible = "fsl,mpc8641-mcm", "fsl,mcm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;