ASoC: rt5659: Update MCLK rate in set_sysclk()

Simple-card/audio-graph-card drivers do not handle MCLK clock when it
is specified in the codec device node. The expectation here is that,
the codec should actually own up the MCLK clock and do necessary setup
in the driver.

Suggested-by: Mark Brown <broonie@kernel.org>
Suggested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Link: https://lore.kernel.org/r/1615829492-8972-3-git-send-email-spujar@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Sameer Pujar 2021-03-15 23:01:32 +05:30 committed by Mark Brown
parent 8ca88d5335
commit dbf54a9534
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1 changed files with 5 additions and 0 deletions

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@ -3426,12 +3426,17 @@ static int rt5659_set_component_sysclk(struct snd_soc_component *component, int
{ {
struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component); struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
unsigned int reg_val = 0; unsigned int reg_val = 0;
int ret;
if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src) if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src)
return 0; return 0;
switch (clk_id) { switch (clk_id) {
case RT5659_SCLK_S_MCLK: case RT5659_SCLK_S_MCLK:
ret = clk_set_rate(rt5659->mclk, freq);
if (ret)
return ret;
reg_val |= RT5659_SCLK_SRC_MCLK; reg_val |= RT5659_SCLK_SRC_MCLK;
break; break;
case RT5659_SCLK_S_PLL1: case RT5659_SCLK_S_PLL1: