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drm/i915: PSR simplify port and link standby checks. 

Current code not just block link_standby for non DDI platforms but also
block PSR from work on other ports B/C/D/E.

So, besides change any behaviour let's just fix the mess a bit here and
reuse HSW check to block the other ports and reduce the second if only to
link stadnby request.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
This commit is contained in:
Rodrigo Vivi 2016-02-01 12:02:06 -08:00
parent a41c888259
commit dc9b5a0c63
1 changed files with 10 additions and 3 deletions
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13
drivers/gpu/drm/i915/intel_psr.c
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@ -304,8 +304,15 @@ static bool intel_psr_match_conditions(struct intel_dp *intel_dp)
dev_priv->psr.source_ok = false; dev_priv->psr.source_ok = false;
if (IS_HASWELL(dev) && dig_port->port != PORT_A) { /*
DRM_DEBUG_KMS("HSW ties PSR to DDI A (eDP)\n"); * HSW spec explicitly says PSR is tied to port A.
* BDW+ platforms with DDI implementation of PSR have different
* PSR registers per transcoder and we only implement transcoder EDP
* ones. Since by Display design transcoder EDP is tied to port A
* we can safely escape based on the port A.
*/
if (HAS_DDI(dev) && dig_port->port != PORT_A) {
DRM_DEBUG_KMS("PSR condition failed: Port not supported\n");
return false; return false;
} }
@ -328,7 +335,7 @@ static bool intel_psr_match_conditions(struct intel_dp *intel_dp)
} }
if (!IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) && if (!IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) &&
((dev_priv->vbt.psr.full_link) || (dig_port->port != PORT_A))) { dev_priv->vbt.psr.full_link) {
DRM_DEBUG_KMS("PSR condition failed: Link Standby requested/needed but not supported on this platform\n"); DRM_DEBUG_KMS("PSR condition failed: Link Standby requested/needed but not supported on this platform\n");
return false; return false;
} }