mirror of https://gitee.com/openkylin/linux.git
ARM: OMAP4: CPUidle: Use coupled cpuidle states to implement SMP cpuidle.
OMAP4 CPUDILE driver is converted mainly based on notes from the coupled cpuidle patch series. The changes include : - Register both CPUs and C-states to cpuidle driver. - Set struct cpuidle_device.coupled_cpus - Set struct cpuidle_device.safe_state to non coupled state. - Set CPUIDLE_FLAG_COUPLED in struct cpuidle_state.flags for each state that affects multiple cpus. - Separate ->enter hooks for coupled & simple idle. - CPU0 wait loop for CPU1 power transition. - CPU1 wakeup mechanism for the idle exit. - Enabling ARCH_NEEDS_CPU_IDLE_COUPLED for OMAP4. Thanks to Kevin Hilman and Colin Cross on the suggestions/fixes on the intermediate version of this patch. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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@ -55,6 +55,7 @@ config ARCH_OMAP4
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select PM_OPP if PM
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select USB_ARCH_HAS_EHCI if USB_SUPPORT
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select ARM_CPU_SUSPEND if PM
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select ARCH_NEEDS_CPU_IDLE_COUPLED
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comment "OMAP Core Type"
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depends on ARCH_OMAP2
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@ -21,6 +21,7 @@
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#include "common.h"
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#include "pm.h"
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#include "prm.h"
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#include "clockdomain.h"
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#ifdef CONFIG_CPU_IDLE
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@ -49,10 +50,11 @@ static struct omap4_idle_statedata omap4_idle_data[] = {
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},
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};
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static struct powerdomain *mpu_pd, *cpu0_pd, *cpu1_pd;
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static struct powerdomain *mpu_pd, *cpu_pd[NR_CPUS];
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static struct clockdomain *cpu_clkdm[NR_CPUS];
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/**
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* omap4_enter_idle - Programs OMAP4 to enter the specified state
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* omap4_enter_idle_coupled_[simple/coupled] - OMAP4 cpuidle entry functions
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* @dev: cpuidle device
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* @drv: cpuidle driver
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* @index: the index of state to be entered
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@ -61,60 +63,71 @@ static struct powerdomain *mpu_pd, *cpu0_pd, *cpu1_pd;
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* specified low power state selected by the governor.
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* Returns the amount of time spent in the low power state.
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*/
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static int omap4_enter_idle(struct cpuidle_device *dev,
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static int omap4_enter_idle_simple(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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local_fiq_disable();
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omap_do_wfi();
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local_fiq_enable();
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return index;
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}
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static int omap4_enter_idle_coupled(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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struct omap4_idle_statedata *cx = &omap4_idle_data[index];
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u32 cpu1_state;
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int cpu_id = smp_processor_id();
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local_fiq_disable();
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/*
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* CPU0 has to stay ON (i.e in C1) until CPU1 is OFF state.
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* CPU0 has to wait and stay ON until CPU1 is OFF state.
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* This is necessary to honour hardware recommondation
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* of triggeing all the possible low power modes once CPU1 is
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* out of coherency and in OFF mode.
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* Update dev->last_state so that governor stats reflects right
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* data.
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*/
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cpu1_state = pwrdm_read_pwrst(cpu1_pd);
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if (cpu1_state != PWRDM_POWER_OFF) {
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index = drv->safe_state_index;
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cx = &omap4_idle_data[index];
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if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
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while (pwrdm_read_pwrst(cpu_pd[1]) != PWRDM_POWER_OFF)
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cpu_relax();
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}
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if (index > 0)
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
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/*
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* Call idle CPU PM enter notifier chain so that
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* VFP and per CPU interrupt context is saved.
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*/
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if (cx->cpu_state == PWRDM_POWER_OFF)
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cpu_pm_enter();
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cpu_pm_enter();
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pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
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omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
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if (dev->cpu == 0) {
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pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
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omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
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/*
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* Call idle CPU cluster PM enter notifier chain
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* to save GIC and wakeupgen context.
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*/
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if ((cx->mpu_state == PWRDM_POWER_RET) &&
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(cx->mpu_logic_state == PWRDM_POWER_OFF))
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cpu_cluster_pm_enter();
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/*
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* Call idle CPU cluster PM enter notifier chain
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* to save GIC and wakeupgen context.
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*/
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if ((cx->mpu_state == PWRDM_POWER_RET) &&
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(cx->mpu_logic_state == PWRDM_POWER_OFF))
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cpu_cluster_pm_enter();
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}
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omap4_enter_lowpower(dev->cpu, cx->cpu_state);
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/* Wakeup CPU1 only if it is not offlined */
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if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
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clkdm_wakeup(cpu_clkdm[1]);
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clkdm_allow_idle(cpu_clkdm[1]);
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}
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/*
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* Call idle CPU PM exit notifier chain to restore
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* VFP and per CPU IRQ context. Only CPU0 state is
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* considered since CPU1 is managed by CPU hotplug.
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* VFP and per CPU IRQ context.
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*/
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if (pwrdm_read_prev_pwrst(cpu0_pd) == PWRDM_POWER_OFF)
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cpu_pm_exit();
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cpu_pm_exit();
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/*
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* Call idle CPU cluster PM exit notifier chain
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@ -123,8 +136,7 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
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if (omap4_mpuss_read_prev_context_state())
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cpu_cluster_pm_exit();
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if (index > 0)
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
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local_fiq_enable();
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@ -143,7 +155,7 @@ struct cpuidle_driver omap4_idle_driver = {
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.exit_latency = 2 + 2,
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.target_residency = 5,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.enter = omap4_enter_idle,
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.enter = omap4_enter_idle_simple,
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.name = "C1",
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.desc = "MPUSS ON"
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},
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@ -151,8 +163,8 @@ struct cpuidle_driver omap4_idle_driver = {
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/* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
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.exit_latency = 328 + 440,
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.target_residency = 960,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.enter = omap4_enter_idle,
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.flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
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.enter = omap4_enter_idle_coupled,
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.name = "C2",
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.desc = "MPUSS CSWR",
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},
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@ -160,8 +172,8 @@ struct cpuidle_driver omap4_idle_driver = {
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/* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
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.exit_latency = 460 + 518,
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.target_residency = 1100,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.enter = omap4_enter_idle,
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.flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
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.enter = omap4_enter_idle_coupled,
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.name = "C3",
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.desc = "MPUSS OSWR",
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},
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@ -182,19 +194,27 @@ int __init omap4_idle_init(void)
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unsigned int cpu_id = 0;
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mpu_pd = pwrdm_lookup("mpu_pwrdm");
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cpu0_pd = pwrdm_lookup("cpu0_pwrdm");
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cpu1_pd = pwrdm_lookup("cpu1_pwrdm");
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if ((!mpu_pd) || (!cpu0_pd) || (!cpu1_pd))
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cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
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cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
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if ((!mpu_pd) || (!cpu_pd[0]) || (!cpu_pd[1]))
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return -ENODEV;
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dev = &per_cpu(omap4_idle_dev, cpu_id);
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dev->cpu = cpu_id;
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cpu_clkdm[0] = clkdm_lookup("mpu0_clkdm");
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cpu_clkdm[1] = clkdm_lookup("mpu1_clkdm");
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if (!cpu_clkdm[0] || !cpu_clkdm[1])
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return -ENODEV;
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cpuidle_register_driver(&omap4_idle_driver);
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for_each_cpu(cpu_id, cpu_online_mask) {
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dev = &per_cpu(omap4_idle_dev, cpu_id);
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dev->cpu = cpu_id;
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dev->coupled_cpus = *cpu_online_mask;
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if (cpuidle_register_device(dev)) {
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pr_err("%s: CPUidle register device failed\n", __func__);
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return -EIO;
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cpuidle_register_driver(&omap4_idle_driver);
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if (cpuidle_register_device(dev)) {
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pr_err("%s: CPUidle register failed\n", __func__);
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return -EIO;
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}
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}
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return 0;
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