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ARM: sun5i: Add clock indices
The A10s and A13 gates have a non continuous set of clock IDs that are valid. Add the clock-indices property to the DT to express this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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@ -85,6 +85,17 @@ ahb_gates: clk@01c20060 {
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compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
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reg = <0x01c20060 0x8>;
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clocks = <&ahb>;
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clock-indices = <0>, <1>,
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<2>, <5>, <6>,
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<7>, <8>, <9>,
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<10>, <13>,
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<14>, <17>, <18>,
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<20>, <21>, <22>,
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<26>, <28>, <32>,
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<34>, <36>, <40>,
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<43>, <44>,
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<46>, <51>,
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<52>;
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clock-output-names = "ahb_usbotg", "ahb_ehci",
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"ahb_ohci", "ahb_ss", "ahb_dma",
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"ahb_bist", "ahb_mmc0", "ahb_mmc1",
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@ -103,6 +114,9 @@ apb0_gates: clk@01c20068 {
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compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
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reg = <0x01c20068 0x4>;
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clocks = <&apb0>;
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clock-indices = <0>, <3>,
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<5>, <6>,
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<10>;
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clock-output-names = "apb0_codec", "apb0_iis",
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"apb0_pio", "apb0_ir",
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"apb0_keypad";
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@ -113,9 +127,14 @@ apb1_gates: clk@01c2006c {
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compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
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reg = <0x01c2006c 0x4>;
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clocks = <&apb1>;
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clock-indices = <0>, <1>,
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<2>, <16>,
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<17>, <18>,
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<19>;
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clock-output-names = "apb1_i2c0", "apb1_i2c1",
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"apb1_i2c2", "apb1_uart0", "apb1_uart1",
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"apb1_uart2", "apb1_uart3";
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"apb1_i2c2", "apb1_uart0",
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"apb1_uart1", "apb1_uart2",
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"apb1_uart3";
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};
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};
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@ -104,6 +104,16 @@ ahb_gates: clk@01c20060 {
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compatible = "allwinner,sun5i-a13-ahb-gates-clk";
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reg = <0x01c20060 0x8>;
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clocks = <&ahb>;
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clock-indices = <0>, <1>,
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<2>, <5>, <6>,
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<7>, <8>, <9>,
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<10>, <13>,
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<14>, <20>,
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<21>, <22>,
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<28>, <32>, <36>,
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<40>, <44>,
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<46>, <51>,
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<52>;
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clock-output-names = "ahb_usbotg", "ahb_ehci",
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"ahb_ohci", "ahb_ss", "ahb_dma",
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"ahb_bist", "ahb_mmc0", "ahb_mmc1",
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@ -121,6 +131,8 @@ apb0_gates: clk@01c20068 {
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compatible = "allwinner,sun5i-a13-apb0-gates-clk";
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reg = <0x01c20068 0x4>;
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clocks = <&apb0>;
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clock-indices = <0>, <5>,
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<6>;
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clock-output-names = "apb0_codec", "apb0_pio",
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"apb0_ir";
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};
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@ -130,8 +142,12 @@ apb1_gates: clk@01c2006c {
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compatible = "allwinner,sun5i-a13-apb1-gates-clk";
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reg = <0x01c2006c 0x4>;
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clocks = <&apb1>;
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clock-indices = <0>, <1>,
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<2>, <17>,
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<19>;
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clock-output-names = "apb1_i2c0", "apb1_i2c1",
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"apb1_i2c2", "apb1_uart1", "apb1_uart3";
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"apb1_i2c2", "apb1_uart1",
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"apb1_uart3";
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};
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};
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};
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@ -178,6 +178,7 @@ axi_gates: clk@01c2005c {
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compatible = "allwinner,sun4i-a10-axi-gates-clk";
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reg = <0x01c2005c 0x4>;
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clocks = <&axi>;
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clock-indices = <0>;
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clock-output-names = "axi_dram";
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};
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