mirror of https://gitee.com/openkylin/linux.git
e1000e: cleanup variables set but not used
The ICR register is clear on read and we don't care what the returned value is when resetting the hardware so the icr variable(s) can be removed. We should not ignore the return from e1000_lv_jumbo_workaround_ich8lan() and from e1000_get_phy_id_82571() (dump a debug message when it fails and when an unknown Phy id is returned). Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Emil Tantilov <emil.s.tantilov@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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0363466866
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@ -121,29 +121,36 @@ static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
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/* This can only be done after all function pointers are setup. */
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ret_val = e1000_get_phy_id_82571(hw);
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if (ret_val) {
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e_dbg("Error getting PHY ID\n");
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return ret_val;
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}
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/* Verify phy id */
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switch (hw->mac.type) {
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case e1000_82571:
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case e1000_82572:
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if (phy->id != IGP01E1000_I_PHY_ID)
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return -E1000_ERR_PHY;
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ret_val = -E1000_ERR_PHY;
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break;
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case e1000_82573:
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if (phy->id != M88E1111_I_PHY_ID)
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return -E1000_ERR_PHY;
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ret_val = -E1000_ERR_PHY;
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break;
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case e1000_82574:
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case e1000_82583:
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if (phy->id != BME1000_E_PHY_ID_R2)
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return -E1000_ERR_PHY;
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ret_val = -E1000_ERR_PHY;
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break;
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default:
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return -E1000_ERR_PHY;
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ret_val = -E1000_ERR_PHY;
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break;
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}
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return 0;
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if (ret_val)
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e_dbg("PHY ID unknown: type = 0x%08x\n", phy->id);
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return ret_val;
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}
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/**
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@ -956,7 +963,7 @@ static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active)
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**/
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static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
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{
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u32 ctrl, ctrl_ext, icr;
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u32 ctrl, ctrl_ext;
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s32 ret_val;
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/*
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@ -1040,7 +1047,7 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
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/* Clear any pending interrupt events. */
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ew32(IMC, 0xffffffff);
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icr = er32(ICR);
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er32(ICR);
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if (hw->mac.type == e1000_82571) {
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/* Install any alternate MAC address into RAR0 */
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@ -784,7 +784,7 @@ static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
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**/
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static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)
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{
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u32 ctrl, icr;
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u32 ctrl;
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s32 ret_val;
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/*
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@ -818,7 +818,7 @@ static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)
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/* Clear any pending interrupt events. */
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ew32(IMC, 0xffffffff);
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icr = er32(ICR);
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er32(ICR);
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ret_val = e1000_check_alt_mac_addr_generic(hw);
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@ -2977,7 +2977,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
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{
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struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
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u16 reg;
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u32 ctrl, icr, kab;
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u32 ctrl, kab;
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s32 ret_val;
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/*
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@ -3067,7 +3067,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
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ew32(CRC_OFFSET, 0x65656565);
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ew32(IMC, 0xffffffff);
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icr = er32(ICR);
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er32(ICR);
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kab = er32(KABGTXD);
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kab |= E1000_KABGTXD_BGSQLBIAS;
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@ -2734,6 +2734,9 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)
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ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
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else
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ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
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if (ret_val)
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e_dbg("failed to enable jumbo frame workaround mode\n");
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}
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/* Program MC offset vector base */
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