mirror of https://gitee.com/openkylin/linux.git
drm/amdgpu: cleanup creating BOs at fixed location (v2)
The placement is something TTM/BO internal and the RAS code should avoid touching that directly. Add a helper to create a BO at a fixed location and use that instead. v2: squash in fixes (Alex) Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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db338e1663
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@ -342,6 +342,67 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
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return 0;
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}
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/**
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* amdgpu_bo_create_kernel_at - create BO for kernel use at specific location
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*
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* @adev: amdgpu device object
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* @offset: offset of the BO
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* @size: size of the BO
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* @domain: where to place it
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* @bo_ptr: used to initialize BOs in structures
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* @cpu_addr: optional CPU address mapping
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*
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* Creates a kernel BO at a specific offset in the address space of the domain.
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*
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* Returns:
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* 0 on success, negative error code otherwise.
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*/
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int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
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uint64_t offset, uint64_t size, uint32_t domain,
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struct amdgpu_bo **bo_ptr, void **cpu_addr)
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{
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struct ttm_operation_ctx ctx = { false, false };
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unsigned int i;
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int r;
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offset &= PAGE_MASK;
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size = ALIGN(size, PAGE_SIZE);
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r = amdgpu_bo_create_reserved(adev, size, PAGE_SIZE, domain, bo_ptr,
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NULL, NULL);
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if (r)
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return r;
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/*
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* Remove the original mem node and create a new one at the request
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* position.
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*/
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for (i = 0; i < (*bo_ptr)->placement.num_placement; ++i) {
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(*bo_ptr)->placements[i].fpfn = offset >> PAGE_SHIFT;
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(*bo_ptr)->placements[i].lpfn = (offset + size) >> PAGE_SHIFT;
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}
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ttm_bo_mem_put(&(*bo_ptr)->tbo, &(*bo_ptr)->tbo.mem);
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r = ttm_bo_mem_space(&(*bo_ptr)->tbo, &(*bo_ptr)->placement,
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&(*bo_ptr)->tbo.mem, &ctx);
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if (r)
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goto error;
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if (cpu_addr) {
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r = amdgpu_bo_kmap(*bo_ptr, cpu_addr);
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if (r)
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goto error;
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}
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amdgpu_bo_unreserve(*bo_ptr);
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return 0;
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error:
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amdgpu_bo_unreserve(*bo_ptr);
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amdgpu_bo_unref(bo_ptr);
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return r;
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}
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/**
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* amdgpu_bo_free_kernel - free BO for kernel use
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*
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@ -238,6 +238,9 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
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unsigned long size, int align,
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u32 domain, struct amdgpu_bo **bo_ptr,
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u64 *gpu_addr, void **cpu_addr);
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int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
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uint64_t offset, uint64_t size, uint32_t domain,
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struct amdgpu_bo **bo_ptr, void **cpu_addr);
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void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
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void **cpu_addr);
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int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr);
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@ -71,12 +71,6 @@ const char *ras_block_string[] = {
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atomic_t amdgpu_ras_in_intr = ATOMIC_INIT(0);
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static int amdgpu_ras_reserve_vram(struct amdgpu_device *adev,
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uint64_t offset, uint64_t size,
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struct amdgpu_bo **bo_ptr);
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static int amdgpu_ras_release_vram(struct amdgpu_device *adev,
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struct amdgpu_bo **bo_ptr);
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static ssize_t amdgpu_ras_debugfs_read(struct file *f, char __user *buf,
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size_t size, loff_t *pos)
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{
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@ -1260,75 +1254,6 @@ static void amdgpu_ras_do_recovery(struct work_struct *work)
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atomic_set(&ras->in_recovery, 0);
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}
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static int amdgpu_ras_release_vram(struct amdgpu_device *adev,
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struct amdgpu_bo **bo_ptr)
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{
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/* no need to free it actually. */
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amdgpu_bo_free_kernel(bo_ptr, NULL, NULL);
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return 0;
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}
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/* reserve vram with size@offset */
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static int amdgpu_ras_reserve_vram(struct amdgpu_device *adev,
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uint64_t offset, uint64_t size,
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struct amdgpu_bo **bo_ptr)
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{
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struct ttm_operation_ctx ctx = { false, false };
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struct amdgpu_bo_param bp;
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int r = 0;
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int i;
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struct amdgpu_bo *bo;
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if (bo_ptr)
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*bo_ptr = NULL;
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memset(&bp, 0, sizeof(bp));
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bp.size = size;
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bp.byte_align = PAGE_SIZE;
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bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
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bp.flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
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AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
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bp.type = ttm_bo_type_kernel;
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bp.resv = NULL;
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r = amdgpu_bo_create(adev, &bp, &bo);
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if (r)
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return -EINVAL;
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r = amdgpu_bo_reserve(bo, false);
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if (r)
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goto error_reserve;
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offset = ALIGN(offset, PAGE_SIZE);
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for (i = 0; i < bo->placement.num_placement; ++i) {
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bo->placements[i].fpfn = offset >> PAGE_SHIFT;
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bo->placements[i].lpfn = (offset + size) >> PAGE_SHIFT;
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}
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ttm_bo_mem_put(&bo->tbo, &bo->tbo.mem);
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r = ttm_bo_mem_space(&bo->tbo, &bo->placement, &bo->tbo.mem, &ctx);
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if (r)
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goto error_pin;
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r = amdgpu_bo_pin_restricted(bo,
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AMDGPU_GEM_DOMAIN_VRAM,
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offset,
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offset + size);
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if (r)
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goto error_pin;
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if (bo_ptr)
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*bo_ptr = bo;
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amdgpu_bo_unreserve(bo);
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return r;
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error_pin:
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amdgpu_bo_unreserve(bo);
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error_reserve:
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amdgpu_bo_unref(&bo);
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return r;
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}
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/* alloc/realloc bps array */
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static int amdgpu_ras_realloc_eh_data_space(struct amdgpu_device *adev,
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struct ras_err_handler_data *data, int pages)
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@ -1464,7 +1389,7 @@ int amdgpu_ras_reserve_bad_pages(struct amdgpu_device *adev)
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struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
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struct ras_err_handler_data *data;
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uint64_t bp;
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struct amdgpu_bo *bo;
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struct amdgpu_bo *bo = NULL;
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int i, ret = 0;
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if (!con || !con->eh_data)
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@ -1478,12 +1403,14 @@ int amdgpu_ras_reserve_bad_pages(struct amdgpu_device *adev)
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for (i = data->last_reserved; i < data->count; i++) {
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bp = data->bps[i].retired_page;
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if (amdgpu_ras_reserve_vram(adev, bp << PAGE_SHIFT,
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PAGE_SIZE, &bo))
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if (amdgpu_bo_create_kernel_at(adev, bp << PAGE_SHIFT, PAGE_SIZE,
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AMDGPU_GEM_DOMAIN_VRAM,
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&bo, NULL))
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DRM_ERROR("RAS ERROR: reserve vram %llx fail\n", bp);
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data->bps_bo[i] = bo;
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data->last_reserved = i + 1;
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bo = NULL;
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}
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/* continue to save bad pages to eeprom even reesrve_vram fails */
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@ -1512,7 +1439,7 @@ static int amdgpu_ras_release_bad_pages(struct amdgpu_device *adev)
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for (i = data->last_reserved - 1; i >= 0; i--) {
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bo = data->bps_bo[i];
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amdgpu_ras_release_vram(adev, &bo);
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amdgpu_bo_free_kernel(&bo, NULL, NULL);
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data->bps_bo[i] = bo;
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data->last_reserved = i;
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@ -1650,81 +1650,25 @@ static void amdgpu_ttm_fw_reserve_vram_fini(struct amdgpu_device *adev)
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*/
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static int amdgpu_ttm_fw_reserve_vram_init(struct amdgpu_device *adev)
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{
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struct ttm_operation_ctx ctx = { false, false };
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struct amdgpu_bo_param bp;
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int r = 0;
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int i;
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u64 vram_size = adev->gmc.visible_vram_size;
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u64 offset = adev->fw_vram_usage.start_offset;
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u64 size = adev->fw_vram_usage.size;
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struct amdgpu_bo *bo;
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uint64_t vram_size = adev->gmc.visible_vram_size;
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int r;
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memset(&bp, 0, sizeof(bp));
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bp.size = adev->fw_vram_usage.size;
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bp.byte_align = PAGE_SIZE;
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bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
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bp.flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
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AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
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bp.type = ttm_bo_type_kernel;
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bp.resv = NULL;
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adev->fw_vram_usage.va = NULL;
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adev->fw_vram_usage.reserved_bo = NULL;
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if (adev->fw_vram_usage.size > 0 &&
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adev->fw_vram_usage.size <= vram_size) {
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if (adev->fw_vram_usage.size == 0 ||
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adev->fw_vram_usage.size > vram_size)
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return 0;
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r = amdgpu_bo_create(adev, &bp,
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&adev->fw_vram_usage.reserved_bo);
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if (r)
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goto error_create;
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r = amdgpu_bo_reserve(adev->fw_vram_usage.reserved_bo, false);
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if (r)
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goto error_reserve;
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/* remove the original mem node and create a new one at the
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* request position
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*/
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bo = adev->fw_vram_usage.reserved_bo;
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offset = ALIGN(offset, PAGE_SIZE);
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for (i = 0; i < bo->placement.num_placement; ++i) {
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bo->placements[i].fpfn = offset >> PAGE_SHIFT;
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bo->placements[i].lpfn = (offset + size) >> PAGE_SHIFT;
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}
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ttm_bo_mem_put(&bo->tbo, &bo->tbo.mem);
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r = ttm_bo_mem_space(&bo->tbo, &bo->placement,
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&bo->tbo.mem, &ctx);
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if (r)
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goto error_pin;
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r = amdgpu_bo_pin_restricted(adev->fw_vram_usage.reserved_bo,
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AMDGPU_GEM_DOMAIN_VRAM,
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return amdgpu_bo_create_kernel_at(adev,
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adev->fw_vram_usage.start_offset,
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(adev->fw_vram_usage.start_offset +
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adev->fw_vram_usage.size));
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if (r)
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goto error_pin;
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r = amdgpu_bo_kmap(adev->fw_vram_usage.reserved_bo,
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adev->fw_vram_usage.size,
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AMDGPU_GEM_DOMAIN_VRAM,
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&adev->fw_vram_usage.reserved_bo,
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&adev->fw_vram_usage.va);
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if (r)
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goto error_kmap;
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amdgpu_bo_unreserve(adev->fw_vram_usage.reserved_bo);
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}
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return r;
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error_kmap:
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amdgpu_bo_unpin(adev->fw_vram_usage.reserved_bo);
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error_pin:
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amdgpu_bo_unreserve(adev->fw_vram_usage.reserved_bo);
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error_reserve:
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amdgpu_bo_unref(&adev->fw_vram_usage.reserved_bo);
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error_create:
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adev->fw_vram_usage.va = NULL;
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adev->fw_vram_usage.reserved_bo = NULL;
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return r;
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}
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/**
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* amdgpu_ttm_init - Init the memory management (ttm) as well as various
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* gtt/vram related fields.
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