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microblaze: Fix kmalloc alignment on non-coherent DMA platforms 

Based on PowerPC patche 52142e756e

PowerPC description:
On platforms doing non-coherent DMA (4xx, 8xx, ...), it's important
that the kmalloc minimum alignment is set to the cache line size, to
avoid sharing cache lines between different objects, so that DMA to
one of the objects doesn't corrupt the other.

Signed-off-by: Michal Simek <monstr@monstr.eu>
This commit is contained in:
Michal Simek 2010-04-26 13:49:01 +02:00
parent c17e1a1ced
commit de925d9d3b
1 changed files with 3 additions and 0 deletions
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3
arch/microblaze/include/asm/page.h
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@ -31,6 +31,9 @@
#ifndef __ASSEMBLY__
/* MS be sure that SLAB allocates aligned objects */
#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
#define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1)))
#define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1)))