mirror of https://gitee.com/openkylin/linux.git
x86/asm: Add suffix macro for GEN_*_RMWcc()
The coming x86 refcount protection needs to be able to add trailing instructions to the GEN_*_RMWcc() operations. This extracts the difference between the goto/non-goto cases so the helper macros can be defined outside the #ifdef cases. Additionally adds argument naming to the resulting asm for referencing from suffixed instructions, and adds clobbers for "cc", and "cx" to let suffixes use _ASM_CX, and retain any set flags. Signed-off-by: Kees Cook <keescook@chromium.org> Cc: Alexey Dobriyan <adobriyan@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Christoph Hellwig <hch@infradead.org> Cc: David S. Miller <davem@davemloft.net> Cc: Davidlohr Bueso <dave@stgolabs.net> Cc: Elena Reshetova <elena.reshetova@intel.com> Cc: Eric Biggers <ebiggers3@gmail.com> Cc: Eric W. Biederman <ebiederm@xmission.com> Cc: Greg KH <gregkh@linuxfoundation.org> Cc: Hans Liljestrand <ishkamiel@gmail.com> Cc: James Bottomley <James.Bottomley@hansenpartnership.com> Cc: Jann Horn <jannh@google.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Manfred Spraul <manfred@colorfullife.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@redhat.com> Cc: Serge E. Hallyn <serge@hallyn.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: arozansk@redhat.com Cc: axboe@kernel.dk Cc: kernel-hardening@lists.openwall.com Cc: linux-arch <linux-arch@vger.kernel.org> Link: http://lkml.kernel.org/r/1500921349-10803-2-git-send-email-keescook@chromium.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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#ifndef _ASM_X86_RMWcc
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#define _ASM_X86_RMWcc
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#define __CLOBBERS_MEM "memory"
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#define __CLOBBERS_MEM_CC_CX "memory", "cc", "cx"
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#if !defined(__GCC_ASM_FLAG_OUTPUTS__) && defined(CC_HAVE_ASM_GOTO)
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/* Use asm goto */
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#define __GEN_RMWcc(fullop, var, cc, ...) \
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#define __GEN_RMWcc(fullop, var, cc, clobbers, ...) \
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do { \
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asm_volatile_goto (fullop "; j" #cc " %l[cc_label]" \
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: : "m" (var), ## __VA_ARGS__ \
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: "memory" : cc_label); \
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: : [counter] "m" (var), ## __VA_ARGS__ \
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: clobbers : cc_label); \
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return 0; \
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cc_label: \
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return 1; \
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} while (0)
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#define GEN_UNARY_RMWcc(op, var, arg0, cc) \
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__GEN_RMWcc(op " " arg0, var, cc)
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#define __BINARY_RMWcc_ARG " %1, "
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#define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \
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__GEN_RMWcc(op " %1, " arg0, var, cc, vcon (val))
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#else /* defined(__GCC_ASM_FLAG_OUTPUTS__) || !defined(CC_HAVE_ASM_GOTO) */
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/* Use flags output or a set instruction */
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#define __GEN_RMWcc(fullop, var, cc, ...) \
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#define __GEN_RMWcc(fullop, var, cc, clobbers, ...) \
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do { \
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bool c; \
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asm volatile (fullop ";" CC_SET(cc) \
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: "+m" (var), CC_OUT(cc) (c) \
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: __VA_ARGS__ : "memory"); \
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: [counter] "+m" (var), CC_OUT(cc) (c) \
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: __VA_ARGS__ : clobbers); \
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return c; \
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} while (0)
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#define GEN_UNARY_RMWcc(op, var, arg0, cc) \
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__GEN_RMWcc(op " " arg0, var, cc)
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#define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \
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__GEN_RMWcc(op " %2, " arg0, var, cc, vcon (val))
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#define __BINARY_RMWcc_ARG " %2, "
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#endif /* defined(__GCC_ASM_FLAG_OUTPUTS__) || !defined(CC_HAVE_ASM_GOTO) */
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#define GEN_UNARY_RMWcc(op, var, arg0, cc) \
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__GEN_RMWcc(op " " arg0, var, cc, __CLOBBERS_MEM)
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#define GEN_UNARY_SUFFIXED_RMWcc(op, suffix, var, arg0, cc) \
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__GEN_RMWcc(op " " arg0 "\n\t" suffix, var, cc, \
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__CLOBBERS_MEM_CC_CX)
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#define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \
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__GEN_RMWcc(op __BINARY_RMWcc_ARG arg0, var, cc, \
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__CLOBBERS_MEM, vcon (val))
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#define GEN_BINARY_SUFFIXED_RMWcc(op, suffix, var, vcon, val, arg0, cc) \
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__GEN_RMWcc(op __BINARY_RMWcc_ARG arg0 "\n\t" suffix, var, cc, \
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__CLOBBERS_MEM_CC_CX, vcon (val))
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#endif /* _ASM_X86_RMWcc */
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