mirror of https://gitee.com/openkylin/linux.git
mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers
For Intel controllers, SDHCI_RESET_ALL resets also CQHCI registers.
Normally, SDHCI_RESET_ALL is not used while CQHCI is enabled, but that can
happen on the error path. e.g. if mmc_cqe_recovery() fails, mmc_blk_reset()
is called which, for a eMMC that does not support HW Reset, will cycle the
bus power and the driver will perform SDHCI_RESET_ALL.
So whenever performing SDHCI_RESET_ALL ensure CQHCI is deactivated.
That will force the driver to reinitialize CQHCI when it is next used.
A similar change was done already for sdhci-msm, and other drivers using
CQHCI might benefit from a similar change, if they also have CQHCI reset
by SDHCI_RESET_ALL.
Fixes: 8ee82bda23
("mmc: sdhci-pci: Add CQHCI support for Intel GLK")
Cc: stable@vger.kernel.org # 5.4.x: 0ffa6cfbd949: mmc: cqhci: Add cqhci_deactivate()
Cc: stable@vger.kernel.org # 5.4+
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200819121848.16967-1-adrian.hunter@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
parent
61d7437ed1
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@ -232,6 +232,14 @@ static void sdhci_pci_dumpregs(struct mmc_host *mmc)
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sdhci_dumpregs(mmc_priv(mmc));
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}
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static void sdhci_cqhci_reset(struct sdhci_host *host, u8 mask)
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{
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if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) &&
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host->mmc->cqe_private)
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cqhci_deactivate(host->mmc);
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sdhci_reset(host, mask);
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}
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/*****************************************************************************\
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* *
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* Hardware specific quirk handling *
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@ -718,7 +726,7 @@ static const struct sdhci_ops sdhci_intel_glk_ops = {
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.set_power = sdhci_intel_set_power,
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.enable_dma = sdhci_pci_enable_dma,
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.set_bus_width = sdhci_set_bus_width,
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.reset = sdhci_reset,
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.reset = sdhci_cqhci_reset,
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.set_uhs_signaling = sdhci_set_uhs_signaling,
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.hw_reset = sdhci_pci_hw_reset,
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.irq = sdhci_cqhci_irq,
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