From df61c776657fa5986267199fdf271bf0fca32d69 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Yannick=20Fertr=C3=A9?= Date: Thu, 21 Mar 2019 09:15:20 +0100 Subject: [PATCH] drm/stm: add sleep power management MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Implements system sleep power management ops. Signed-off-by: Yannick Fertré Acked-by: Philippe Cornu Signed-off-by: Benjamin Gaignard Link: https://patchwork.freedesktop.org/patch/msgid/1553156120-13851-1-git-send-email-yannick.fertre@st.com --- drivers/gpu/drm/stm/drv.c | 35 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/stm/ltdc.c | 24 ++++++++++++++++++++++++ drivers/gpu/drm/stm/ltdc.h | 3 +++ 3 files changed, 62 insertions(+) diff --git a/drivers/gpu/drm/stm/drv.c b/drivers/gpu/drm/stm/drv.c index 0a7f933ab007..5834ef56fbaa 100644 --- a/drivers/gpu/drm/stm/drv.c +++ b/drivers/gpu/drm/stm/drv.c @@ -129,6 +129,40 @@ static void drv_unload(struct drm_device *ddev) drm_mode_config_cleanup(ddev); } +static __maybe_unused int drv_suspend(struct device *dev) +{ + struct drm_device *ddev = dev_get_drvdata(dev); + struct ltdc_device *ldev = ddev->dev_private; + struct drm_atomic_state *state; + + drm_kms_helper_poll_disable(ddev); + state = drm_atomic_helper_suspend(ddev); + if (IS_ERR(state)) { + drm_kms_helper_poll_enable(ddev); + return PTR_ERR(state); + } + ldev->suspend_state = state; + ltdc_suspend(ddev); + + return 0; +} + +static __maybe_unused int drv_resume(struct device *dev) +{ + struct drm_device *ddev = dev_get_drvdata(dev); + struct ltdc_device *ldev = ddev->dev_private; + + ltdc_resume(ddev); + drm_atomic_helper_resume(ddev, ldev->suspend_state); + drm_kms_helper_poll_enable(ddev); + + return 0; +} + +static const struct dev_pm_ops drv_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(drv_suspend, drv_resume) +}; + static int stm_drm_platform_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -186,6 +220,7 @@ static struct platform_driver stm_drm_platform_driver = { .driver = { .name = "stm32-display", .of_match_table = drv_dt_ids, + .pm = &drv_pm_ops, }, }; diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index b1741a9d5be2..32fd6a3b37fb 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -1062,6 +1062,30 @@ static int ltdc_get_caps(struct drm_device *ddev) return 0; } +void ltdc_suspend(struct drm_device *ddev) +{ + struct ltdc_device *ldev = ddev->dev_private; + + DRM_DEBUG_DRIVER("\n"); + clk_disable_unprepare(ldev->pixel_clk); +} + +int ltdc_resume(struct drm_device *ddev) +{ + struct ltdc_device *ldev = ddev->dev_private; + int ret; + + DRM_DEBUG_DRIVER("\n"); + + ret = clk_prepare_enable(ldev->pixel_clk); + if (ret) { + DRM_ERROR("failed to enable pixel clock (%d)\n", ret); + return ret; + } + + return 0; +} + int ltdc_load(struct drm_device *ddev) { struct platform_device *pdev = to_platform_device(ddev->dev); diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h index e46f477a8494..a1ad0ae3b006 100644 --- a/drivers/gpu/drm/stm/ltdc.h +++ b/drivers/gpu/drm/stm/ltdc.h @@ -36,6 +36,7 @@ struct ltdc_device { u32 error_status; u32 irq_status; struct fps_info plane_fpsi[LTDC_MAX_LAYER]; + struct drm_atomic_state *suspend_state; }; bool ltdc_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, @@ -45,5 +46,7 @@ bool ltdc_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, int ltdc_load(struct drm_device *ddev); void ltdc_unload(struct drm_device *ddev); +void ltdc_suspend(struct drm_device *ddev); +int ltdc_resume(struct drm_device *ddev); #endif