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ARC: [axs101] Prepare for AXS103 

To avoid duplicating the MB DTS file, move the MB intc entry into cpu
card specific file

Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
Alexey Brodkin 2015-04-01 18:51:00 +05:30 committed by Vineet Gupta
parent a12ebe16a5
commit e0183f5230
2 changed files with 21 additions and 17 deletions
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21
arch/arc/boot/dts/axc001.dtsi
View File

@ -69,6 +69,27 @@ arcpmu0: pmu {
};
};
/*
* This INTC is actually connected to DW APB GPIO
* which acts as a wire between MB INTC and CPU INTC.
* GPIO INTC is configured in platform init code
* and here we mimic direct connection from MB INTC to
* CPU INTC, thus we set "interrupts = <7>" instead of
* "interrupts = <12>"
*
* This intc actually resides on MB, but we move it here to
* avoid duplicating the MB dtsi file given that IRQ from
* this intc to cpu intc are different for axs101 and axs103
*/
mb_intc: dw-apb-ictl@0xe0012000 {
#interrupt-cells = <1>;
compatible = "snps,dw-apb-ictl";
reg = < 0xe0012000 0x200 >;
interrupt-controller;
interrupt-parent = <&cpu_intc>;
interrupts = < 7 >;
};
memory {
#address-cells = <1>;
#size-cells = <1>;

17
arch/arc/boot/dts/axs10x_mb.dtsi
View File

@ -36,23 +36,6 @@ mmcclk: mmcclk {
};
};
/*
* This INTC is actually connected to DW APB GPIO
* which acts as a wire between MB INTC and CPU INTC.
* GPIO INTC is configured in platform init code
* and here we mimic direct connection from MB INTC to
* CPU INTC, thus we set "interrupts = <7>" instead of
* "interrupts = <12>"
*/
mb_intc: dw-apb-ictl@0x12000 {
#interrupt-cells = <1>;
compatible = "snps,dw-apb-ictl";
reg = < 0x12000 0x200 >;
interrupt-controller;
interrupt-parent = <&cpu_intc>;
interrupts = < 7 >;
};
ethernet@0x18000 {
#interrupt-cells = <1>;
compatible = "snps,dwmac";