mirror of https://gitee.com/openkylin/linux.git
Merge branch 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 RAS update from Ingo Molnar: "The changes in this cycle were: - allow mmcfg access to APEI error injection handlers - improve MCE error messages - smaller cleanups" * 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, mce: Fix sparse errors x86, mce: Improve timeout error messages ACPI, EINJ: Enhance error injection tolerance level
This commit is contained in:
commit
e07e0d4cb0
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@ -116,7 +116,7 @@ static void (*quirk_no_way_out)(int bank, struct mce *m, struct pt_regs *regs);
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* CPU/chipset specific EDAC code can register a notifier call here to print
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* MCE errors in a human-readable form.
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*/
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ATOMIC_NOTIFIER_HEAD(x86_mce_decoder_chain);
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static ATOMIC_NOTIFIER_HEAD(x86_mce_decoder_chain);
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/* Do initial initialization of a struct mce */
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void mce_setup(struct mce *m)
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@ -312,7 +312,7 @@ static void wait_for_panic(void)
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panic("Panicing machine check CPU died");
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}
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static void mce_panic(char *msg, struct mce *final, char *exp)
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static void mce_panic(const char *msg, struct mce *final, char *exp)
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{
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int i, apei_err = 0;
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@ -530,7 +530,7 @@ static void mce_schedule_work(void)
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schedule_work(this_cpu_ptr(&mce_work));
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}
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DEFINE_PER_CPU(struct irq_work, mce_irq_work);
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static DEFINE_PER_CPU(struct irq_work, mce_irq_work);
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static void mce_irq_work_cb(struct irq_work *entry)
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{
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@ -736,7 +736,7 @@ static atomic_t mce_callin;
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/*
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* Check if a timeout waiting for other CPUs happened.
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*/
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static int mce_timed_out(u64 *t)
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static int mce_timed_out(u64 *t, const char *msg)
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{
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/*
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* The others already did panic for some reason.
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@ -751,8 +751,7 @@ static int mce_timed_out(u64 *t)
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goto out;
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if ((s64)*t < SPINUNIT) {
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if (mca_cfg.tolerant <= 1)
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mce_panic("Timeout synchronizing machine check over CPUs",
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NULL, NULL);
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mce_panic(msg, NULL, NULL);
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cpu_missing = 1;
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return 1;
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}
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@ -868,7 +867,8 @@ static int mce_start(int *no_way_out)
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* Wait for everyone.
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*/
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while (atomic_read(&mce_callin) != cpus) {
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if (mce_timed_out(&timeout)) {
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if (mce_timed_out(&timeout,
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"Timeout: Not all CPUs entered broadcast exception handler")) {
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atomic_set(&global_nwo, 0);
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return -1;
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}
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@ -893,7 +893,8 @@ static int mce_start(int *no_way_out)
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* only seen by one CPU before cleared, avoiding duplicates.
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*/
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while (atomic_read(&mce_executing) < order) {
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if (mce_timed_out(&timeout)) {
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if (mce_timed_out(&timeout,
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"Timeout: Subject CPUs unable to finish machine check processing")) {
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atomic_set(&global_nwo, 0);
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return -1;
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}
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@ -937,7 +938,8 @@ static int mce_end(int order)
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* loops.
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*/
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while (atomic_read(&mce_executing) <= cpus) {
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if (mce_timed_out(&timeout))
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if (mce_timed_out(&timeout,
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"Timeout: Monarch CPU unable to finish machine check processing"))
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goto reset;
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ndelay(SPINUNIT);
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}
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@ -950,7 +952,8 @@ static int mce_end(int order)
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* Subject: Wait for Monarch to finish.
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*/
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while (atomic_read(&mce_executing) != 0) {
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if (mce_timed_out(&timeout))
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if (mce_timed_out(&timeout,
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"Timeout: Monarch CPU did not finish machine check processing"))
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goto reset;
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ndelay(SPINUNIT);
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}
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@ -610,6 +610,32 @@ static int __init pci_parse_mcfg(struct acpi_table_header *header)
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return 0;
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}
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#ifdef CONFIG_ACPI_APEI
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extern int (*arch_apei_filter_addr)(int (*func)(__u64 start, __u64 size,
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void *data), void *data);
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static int pci_mmcfg_for_each_region(int (*func)(__u64 start, __u64 size,
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void *data), void *data)
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{
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struct pci_mmcfg_region *cfg;
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int rc;
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if (list_empty(&pci_mmcfg_list))
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return 0;
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list_for_each_entry(cfg, &pci_mmcfg_list, list) {
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rc = func(cfg->res.start, resource_size(&cfg->res), data);
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if (rc)
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return rc;
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}
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return 0;
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}
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#define set_apei_filter() (arch_apei_filter_addr = pci_mmcfg_for_each_region)
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#else
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#define set_apei_filter()
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#endif
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static void __init __pci_mmcfg_init(int early)
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{
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pci_mmcfg_reject_broken(early);
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@ -644,6 +670,8 @@ void __init pci_mmcfg_early_init(void)
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else
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acpi_sfi_table_parse(ACPI_SIG_MCFG, pci_parse_mcfg);
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__pci_mmcfg_init(1);
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set_apei_filter();
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}
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}
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@ -449,7 +449,7 @@ int apei_resources_sub(struct apei_resources *resources1,
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}
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EXPORT_SYMBOL_GPL(apei_resources_sub);
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static int apei_get_nvs_callback(__u64 start, __u64 size, void *data)
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static int apei_get_res_callback(__u64 start, __u64 size, void *data)
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{
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struct apei_resources *resources = data;
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return apei_res_add(&resources->iomem, start, size);
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@ -457,7 +457,15 @@ static int apei_get_nvs_callback(__u64 start, __u64 size, void *data)
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static int apei_get_nvs_resources(struct apei_resources *resources)
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{
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return acpi_nvs_for_each_region(apei_get_nvs_callback, resources);
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return acpi_nvs_for_each_region(apei_get_res_callback, resources);
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}
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int (*arch_apei_filter_addr)(int (*func)(__u64 start, __u64 size,
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void *data), void *data);
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static int apei_get_arch_resources(struct apei_resources *resources)
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{
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return arch_apei_filter_addr(apei_get_res_callback, resources);
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}
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/*
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@ -470,7 +478,7 @@ int apei_resources_request(struct apei_resources *resources,
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{
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struct apei_res *res, *res_bak = NULL;
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struct resource *r;
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struct apei_resources nvs_resources;
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struct apei_resources nvs_resources, arch_res;
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int rc;
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rc = apei_resources_sub(resources, &apei_resources_all);
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@ -485,10 +493,20 @@ int apei_resources_request(struct apei_resources *resources,
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apei_resources_init(&nvs_resources);
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rc = apei_get_nvs_resources(&nvs_resources);
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if (rc)
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goto res_fini;
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goto nvs_res_fini;
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rc = apei_resources_sub(resources, &nvs_resources);
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if (rc)
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goto res_fini;
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goto nvs_res_fini;
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if (arch_apei_filter_addr) {
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apei_resources_init(&arch_res);
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rc = apei_get_arch_resources(&arch_res);
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if (rc)
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goto arch_res_fini;
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rc = apei_resources_sub(resources, &arch_res);
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if (rc)
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goto arch_res_fini;
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}
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rc = -EINVAL;
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list_for_each_entry(res, &resources->iomem, list) {
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break;
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release_mem_region(res->start, res->end - res->start);
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}
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res_fini:
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arch_res_fini:
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apei_resources_fini(&arch_res);
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nvs_res_fini:
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apei_resources_fini(&nvs_resources);
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return rc;
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}
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