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ARC: smp: irqchip: handle IPI as percpu irq like timer 

The reason this was not done so far was lack of genuine IPI_IRQ for
ARC700, as we don't have a SMP version of core yet (which might change
soon thx to EZChip). Nevertheles to increase the build coverage, we
need to allow CONFIG_SMP for ARC700 and still be able to run it on a
UP platform (nsim or AXS101) with a UP Device Tree (SMP-on-UP)

The build itself requires some define for IPI_IRQ and even a dummy
value is fine since that code won't run anyways.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
Vineet Gupta 2015-10-12 14:58:54 +05:30
parent 3971cdc202
commit e0868e6f67
2 changed files with 9 additions and 9 deletions
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1
arch/arc/include/asm/irq.h
View File

@ -16,6 +16,7 @@
#ifdef CONFIG_ISA_ARCOMPACT
#define TIMER0_IRQ 3
#define TIMER1_IRQ 4
#define IPI_IRQ (NR_CPU_IRQS-1) /* dummy to enable SMP build for up hardware */
#else
#define TIMER0_IRQ 16
#define TIMER1_IRQ 17

17
arch/arc/kernel/intc-compact.c
View File

@ -79,17 +79,16 @@ static struct irq_chip onchip_intc = {
static int arc_intc_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
{
/*
* XXX: the IPI IRQ needs to be handled like TIMER too. However ARC core
* code doesn't own it (like TIMER0). ISS IDU / ezchip define it
* in platform header which can't be included here as it goes
* against multi-platform image philisophy
*/
if (irq == TIMER0_IRQ)
switch (irq) {
case TIMER0_IRQ:
#ifdef CONFIG_SMP
case IPI_IRQ:
#endif
irq_set_chip_and_handler(irq, &onchip_intc, handle_percpu_irq);
else
break;
default:
irq_set_chip_and_handler(irq, &onchip_intc, handle_level_irq);
}
return 0;
}