MIPS: Document Pistachio boot protocol and device-tree bindings

The Pistachio SoC boots only with device-tree.  Document the required
properties and nodes as well as the boot protocol between the bootlaoder
and the kernel.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Cc: James Hartley <james.hartley@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/9568/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Andrew Bresticker 2015-03-16 14:43:09 -07:00 committed by Ralf Baechle
parent b76a4c1ae1
commit e14ba3cdd6
1 changed files with 42 additions and 0 deletions

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Imagination Pistachio SoC
=========================
Required properties:
--------------------
- compatible: Must include "img,pistachio".
CPU nodes:
----------
A "cpus" node is required. Required properties:
- #address-cells: Must be 1.
- #size-cells: Must be 0.
A CPU sub-node is also required for at least CPU 0. Since the topology may
be probed via CPS, it is not necessary to specify secondary CPUs. Required
propertis:
- device_type: Must be "cpu".
- compatible: Must be "mti,interaptiv".
- reg: CPU number.
- clocks: Must include the CPU clock. See ../../clock/clock-bindings.txt for
details on clock bindings.
Example:
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "mti,interaptiv";
reg = <0>;
clocks = <&clk_core CLK_MIPS>;
};
};
Boot protocol:
--------------
In accordance with the MIPS UHI specification[1], the bootloader must pass the
following arguments to the kernel:
- $a0: -2.
- $a1: KSEG0 address of the flattened device-tree blob.
[1] http://prplfoundation.org/wiki/MIPS_documentation