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Merge branch 'drm-fixes-5.2' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 

Fixes for 5.2:
- Extend previous vce fix for resume to uvd and vcn
- Fix bounds checking in ras debugfs interface
- Fix a regression on SI using amdgpu

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190613021856.3307-1-alexander.deucher@amd.com
This commit is contained in:
Daniel Vetter 2019-06-14 17:46:54 +02:00
parent 744ed8cb8a f3a5231c8f
commit e14c5873d2
5 changed files with 15 additions and 5 deletions
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4
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
View File

@ -2492,7 +2492,7 @@ void amdgpu_pm_print_power_states(struct amdgpu_device *adev)
int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev, uint32_t *smu_version) int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev, uint32_t *smu_version)
{ {
int r = -EINVAL; int r;
if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->load_firmware) { if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->load_firmware) {
r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle); r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle);
@ -2502,7 +2502,7 @@ int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev, uint32_t *smu_versio
} }
*smu_version = adev->pm.fw_version; *smu_version = adev->pm.fw_version;
} }
return r; return 0;
} }
int amdgpu_pm_sysfs_init(struct amdgpu_device *adev) int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)

2
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
View File

@ -172,6 +172,8 @@ static inline int amdgpu_ras_is_supported(struct amdgpu_device *adev,
{ {
struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
if (block >= AMDGPU_RAS_BLOCK_COUNT)
return 0;
return ras && (ras->supported & (1 << block)); return ras && (ras->supported & (1 << block));
} }

4
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
View File

@ -594,7 +594,7 @@ int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
int amdgpu_vcn_enc_ring_test_ring(struct amdgpu_ring *ring) int amdgpu_vcn_enc_ring_test_ring(struct amdgpu_ring *ring)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
uint32_t rptr = amdgpu_ring_get_rptr(ring); uint32_t rptr;
unsigned i; unsigned i;
int r; int r;
@ -602,6 +602,8 @@ int amdgpu_vcn_enc_ring_test_ring(struct amdgpu_ring *ring)
if (r) if (r)
return r; return r;
rptr = amdgpu_ring_get_rptr(ring);
amdgpu_ring_write(ring, VCN_ENC_CMD_END); amdgpu_ring_write(ring, VCN_ENC_CMD_END);
amdgpu_ring_commit(ring); amdgpu_ring_commit(ring);

5
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
View File

@ -170,13 +170,16 @@ static void uvd_v6_0_enc_ring_set_wptr(struct amdgpu_ring *ring)
static int uvd_v6_0_enc_ring_test_ring(struct amdgpu_ring *ring) static int uvd_v6_0_enc_ring_test_ring(struct amdgpu_ring *ring)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
uint32_t rptr = amdgpu_ring_get_rptr(ring); uint32_t rptr;
unsigned i; unsigned i;
int r; int r;
r = amdgpu_ring_alloc(ring, 16); r = amdgpu_ring_alloc(ring, 16);
if (r) if (r)
return r; return r;
rptr = amdgpu_ring_get_rptr(ring);
amdgpu_ring_write(ring, HEVC_ENC_CMD_END); amdgpu_ring_write(ring, HEVC_ENC_CMD_END);
amdgpu_ring_commit(ring); amdgpu_ring_commit(ring);

5
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
View File

@ -175,7 +175,7 @@ static void uvd_v7_0_enc_ring_set_wptr(struct amdgpu_ring *ring)
static int uvd_v7_0_enc_ring_test_ring(struct amdgpu_ring *ring) static int uvd_v7_0_enc_ring_test_ring(struct amdgpu_ring *ring)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
uint32_t rptr = amdgpu_ring_get_rptr(ring); uint32_t rptr;
unsigned i; unsigned i;
int r; int r;
@ -185,6 +185,9 @@ static int uvd_v7_0_enc_ring_test_ring(struct amdgpu_ring *ring)
r = amdgpu_ring_alloc(ring, 16); r = amdgpu_ring_alloc(ring, 16);
if (r) if (r)
return r; return r;
rptr = amdgpu_ring_get_rptr(ring);
amdgpu_ring_write(ring, HEVC_ENC_CMD_END); amdgpu_ring_write(ring, HEVC_ENC_CMD_END);
amdgpu_ring_commit(ring); amdgpu_ring_commit(ring);