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ARM: OMAP4: hwmod data: add OCM RAM IP block
Add the OCM RAM IP block and interconnect data. This is an oh-chip block of SRAM connected directly to the L3 bus. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Benoît Cousson <b-cousson@ti.com>
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@ -281,7 +281,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
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* efuse_ctrl_std
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* efuse_ctrl_std
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* mpu_c0
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* mpu_c0
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* mpu_c1
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* mpu_c1
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* ocmc_ram
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* ocp_wp_noc
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* ocp_wp_noc
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* prcm_mpu
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* prcm_mpu
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* prm
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* prm
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@ -2384,6 +2383,28 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
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},
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},
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};
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};
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/*
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* 'ocmc_ram' class
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* top-level core on-chip ram
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*/
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static struct omap_hwmod_class omap44xx_ocmc_ram_hwmod_class = {
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.name = "ocmc_ram",
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};
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/* ocmc_ram */
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static struct omap_hwmod omap44xx_ocmc_ram_hwmod = {
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.name = "ocmc_ram",
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.class = &omap44xx_ocmc_ram_hwmod_class,
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.clkdm_name = "l3_2_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_L3_2_OCMC_RAM_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET,
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},
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},
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};
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/*
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/*
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* 'ocp2scp' class
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* 'ocp2scp' class
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* bridge to transform ocp interface protocol to scp (serial control port)
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* bridge to transform ocp interface protocol to scp (serial control port)
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@ -4964,6 +4985,14 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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};
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/* l3_main_2 -> ocmc_ram */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ocmc_ram = {
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.master = &omap44xx_l3_main_2_hwmod,
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.slave = &omap44xx_ocmc_ram_hwmod,
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.clk = "l3_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> ocp2scp_usb_phy */
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/* l4_cfg -> ocp2scp_usb_phy */
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static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp2scp_usb_phy = {
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static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp2scp_usb_phy = {
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.master = &omap44xx_l4_cfg_hwmod,
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.master = &omap44xx_l4_cfg_hwmod,
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@ -5695,6 +5724,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l4_per__mmc3,
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&omap44xx_l4_per__mmc3,
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&omap44xx_l4_per__mmc4,
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&omap44xx_l4_per__mmc4,
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&omap44xx_l4_per__mmc5,
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&omap44xx_l4_per__mmc5,
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&omap44xx_l3_main_2__ocmc_ram,
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&omap44xx_l4_cfg__ocp2scp_usb_phy,
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&omap44xx_l4_cfg__ocp2scp_usb_phy,
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&omap44xx_l3_main_2__sl2if,
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&omap44xx_l3_main_2__sl2if,
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&omap44xx_l4_abe__slimbus1,
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&omap44xx_l4_abe__slimbus1,
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