mirror of https://gitee.com/openkylin/linux.git
arm64: dts: exynos: Fix FSYS CMU parent clocks in Exynos5433 SoC
This patch corrects FSYS CMU parent clocks specified in clock controller node to let improved Exynos5433 clocks driver to control proper clocks on FSYS<->TOP CMU boundary. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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@ -312,7 +312,7 @@ cmu_fsys: clock-controller@156e0000 {
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clock-names = "oscclk",
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"sclk_ufs_mphy",
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"div_aclk_fsys_200",
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"aclk_fsys_200",
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"sclk_pcie_100_fsys",
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"sclk_ufsunipro_fsys",
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"sclk_mmc2_fsys",
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@ -322,7 +322,7 @@ cmu_fsys: clock-controller@156e0000 {
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"sclk_usbdrd30_fsys";
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clocks = <&xxti>,
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<&cmu_cpif CLK_SCLK_UFS_MPHY>,
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<&cmu_top CLK_DIV_ACLK_FSYS_200>,
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<&cmu_top CLK_ACLK_FSYS_200>,
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<&cmu_top CLK_SCLK_PCIE_100_FSYS>,
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<&cmu_top CLK_SCLK_UFSUNIPRO_FSYS>,
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<&cmu_top CLK_SCLK_MMC2_FSYS>,
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