soc/tegra: Changes for v5.8-rc1

Enables Tegra210, Tegra186 and Tegra194 to be woken from suspend by the
 PMIC and exports a bit more information about SoCs via sysfs.
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Merge tag 'tegra-for-5.8-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.8-rc1

Enables Tegra210, Tegra186 and Tegra194 to be woken from suspend by the
PMIC and exports a bit more information about SoCs via sysfs.

* tag 'tegra-for-5.8-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Enable PMIC wake event on Tegra210
  soc: tegra: Fix tegra_pmc_get_suspend_mode definition
  soc/tegra: pmc: Enable PMIC wake event on Tegra194
  soc/tegra: pmc: Select GENERIC_PINCONF
  soc/tegra: fuse: Update the SoC revision attribute to display a name
  soc/tegra: fuse: Trivial clean-up of tegra_init_revision()
  soc/tegra: fuse: Add custom SoC attributes
  soc/tegra: pmc: Enable PMIC wake event on Tegra186

Link: https://lore.kernel.org/r/20200522142846.2376224-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-05-25 23:57:13 +02:00
commit e26552c5e0
7 changed files with 94 additions and 14 deletions

View File

@ -133,6 +133,7 @@ config SOC_TEGRA_FLOWCTRL
config SOC_TEGRA_PMC
bool
select GENERIC_PINCONF
config SOC_TEGRA_POWERGATE_BPMP
def_bool y

View File

@ -300,6 +300,59 @@ static void tegra_enable_fuse_clk(void __iomem *base)
writel(reg, base + 0x14);
}
static ssize_t major_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
return sprintf(buf, "%d\n", tegra_get_major_rev());
}
static DEVICE_ATTR_RO(major);
static ssize_t minor_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
return sprintf(buf, "%d\n", tegra_get_minor_rev());
}
static DEVICE_ATTR_RO(minor);
static struct attribute *tegra_soc_attr[] = {
&dev_attr_major.attr,
&dev_attr_minor.attr,
NULL,
};
const struct attribute_group tegra_soc_attr_group = {
.attrs = tegra_soc_attr,
};
#ifdef CONFIG_ARCH_TEGRA_194_SOC
static ssize_t platform_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
/*
* Displays the value in the 'pre_si_platform' field of the HIDREV
* register for Tegra194 devices. A value of 0 indicates that the
* platform type is silicon and all other non-zero values indicate
* the type of simulation platform is being used.
*/
return sprintf(buf, "%d\n", (tegra_read_chipid() >> 20) & 0xf);
}
static DEVICE_ATTR_RO(platform);
static struct attribute *tegra194_soc_attr[] = {
&dev_attr_major.attr,
&dev_attr_minor.attr,
&dev_attr_platform.attr,
NULL,
};
const struct attribute_group tegra194_soc_attr_group = {
.attrs = tegra194_soc_attr,
};
#endif
struct device * __init tegra_soc_device_register(void)
{
struct soc_device_attribute *attr;
@ -310,8 +363,10 @@ struct device * __init tegra_soc_device_register(void)
return NULL;
attr->family = kasprintf(GFP_KERNEL, "Tegra");
attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_sku_info.revision);
attr->revision = kasprintf(GFP_KERNEL, "%s",
tegra_revision_name[tegra_sku_info.revision]);
attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id());
attr->custom_attr_group = fuse->soc->soc_attr_group;
dev = soc_device_register(attr);
if (IS_ERR(dev)) {

View File

@ -164,4 +164,5 @@ const struct tegra_fuse_soc tegra20_fuse_soc = {
.speedo_init = tegra20_init_speedo_data,
.probe = tegra20_fuse_probe,
.info = &tegra20_fuse_info,
.soc_attr_group = &tegra_soc_attr_group,
};

View File

@ -111,6 +111,7 @@ const struct tegra_fuse_soc tegra30_fuse_soc = {
.init = tegra30_fuse_init,
.speedo_init = tegra30_init_speedo_data,
.info = &tegra30_fuse_info,
.soc_attr_group = &tegra_soc_attr_group,
};
#endif
@ -125,6 +126,7 @@ const struct tegra_fuse_soc tegra114_fuse_soc = {
.init = tegra30_fuse_init,
.speedo_init = tegra114_init_speedo_data,
.info = &tegra114_fuse_info,
.soc_attr_group = &tegra_soc_attr_group,
};
#endif
@ -205,6 +207,7 @@ const struct tegra_fuse_soc tegra124_fuse_soc = {
.info = &tegra124_fuse_info,
.lookups = tegra124_fuse_lookups,
.num_lookups = ARRAY_SIZE(tegra124_fuse_lookups),
.soc_attr_group = &tegra_soc_attr_group,
};
#endif
@ -290,6 +293,7 @@ const struct tegra_fuse_soc tegra210_fuse_soc = {
.info = &tegra210_fuse_info,
.lookups = tegra210_fuse_lookups,
.num_lookups = ARRAY_SIZE(tegra210_fuse_lookups),
.soc_attr_group = &tegra_soc_attr_group,
};
#endif
@ -319,6 +323,7 @@ const struct tegra_fuse_soc tegra186_fuse_soc = {
.info = &tegra186_fuse_info,
.lookups = tegra186_fuse_lookups,
.num_lookups = ARRAY_SIZE(tegra186_fuse_lookups),
.soc_attr_group = &tegra_soc_attr_group,
};
#endif
@ -348,5 +353,6 @@ const struct tegra_fuse_soc tegra194_fuse_soc = {
.info = &tegra194_fuse_info,
.lookups = tegra194_fuse_lookups,
.num_lookups = ARRAY_SIZE(tegra194_fuse_lookups),
.soc_attr_group = &tegra194_soc_attr_group,
};
#endif

View File

@ -32,6 +32,8 @@ struct tegra_fuse_soc {
const struct nvmem_cell_lookup *lookups;
unsigned int num_lookups;
const struct attribute_group *soc_attr_group;
};
struct tegra_fuse {
@ -64,6 +66,11 @@ void tegra_init_apbmisc(void);
bool __init tegra_fuse_read_spare(unsigned int spare);
u32 __init tegra_fuse_read_early(unsigned int offset);
u8 tegra_get_major_rev(void);
u8 tegra_get_minor_rev(void);
extern const struct attribute_group tegra_soc_attr_group;
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
void tegra20_init_speedo_data(struct tegra_sku_info *sku_info);
#endif
@ -110,6 +117,7 @@ extern const struct tegra_fuse_soc tegra186_fuse_soc;
#ifdef CONFIG_ARCH_TEGRA_194_SOC
extern const struct tegra_fuse_soc tegra194_fuse_soc;
extern const struct attribute_group tegra194_soc_attr_group;
#endif
#endif

View File

@ -37,6 +37,16 @@ u8 tegra_get_chip_id(void)
return (tegra_read_chipid() >> 8) & 0xff;
}
u8 tegra_get_major_rev(void)
{
return (tegra_read_chipid() >> 4) & 0xf;
}
u8 tegra_get_minor_rev(void)
{
return (tegra_read_chipid() >> 16) & 0xf;
}
u32 tegra_read_straps(void)
{
WARN(!chipid, "Tegra ABP MISC not yet available\n");
@ -65,36 +75,32 @@ static const struct of_device_id apbmisc_match[] __initconst = {
void __init tegra_init_revision(void)
{
u32 id, chip_id, minor_rev;
int rev;
u8 chip_id, minor_rev;
id = tegra_read_chipid();
chip_id = (id >> 8) & 0xff;
minor_rev = (id >> 16) & 0xf;
chip_id = tegra_get_chip_id();
minor_rev = tegra_get_minor_rev();
switch (minor_rev) {
case 1:
rev = TEGRA_REVISION_A01;
tegra_sku_info.revision = TEGRA_REVISION_A01;
break;
case 2:
rev = TEGRA_REVISION_A02;
tegra_sku_info.revision = TEGRA_REVISION_A02;
break;
case 3:
if (chip_id == TEGRA20 && (tegra_fuse_read_spare(18) ||
tegra_fuse_read_spare(19)))
rev = TEGRA_REVISION_A03p;
tegra_sku_info.revision = TEGRA_REVISION_A03p;
else
rev = TEGRA_REVISION_A03;
tegra_sku_info.revision = TEGRA_REVISION_A03;
break;
case 4:
rev = TEGRA_REVISION_A04;
tegra_sku_info.revision = TEGRA_REVISION_A04;
break;
default:
rev = TEGRA_REVISION_UNKNOWN;
tegra_sku_info.revision = TEGRA_REVISION_UNKNOWN;
}
tegra_sku_info.revision = rev;
tegra_sku_info.sku_id = tegra_fuse_read_early(FUSE_SKU_INFO);
}

View File

@ -3063,6 +3063,7 @@ static const struct pinctrl_pin_desc tegra210_pin_descs[] = {
static const struct tegra_wake_event tegra210_wake_events[] = {
TEGRA_WAKE_IRQ("rtc", 16, 2),
TEGRA_WAKE_IRQ("pmu", 51, 86),
};
static const struct tegra_pmc_soc tegra210_pmc_soc = {
@ -3193,6 +3194,7 @@ static void tegra186_pmc_setup_irq_polarity(struct tegra_pmc *pmc,
}
static const struct tegra_wake_event tegra186_wake_events[] = {
TEGRA_WAKE_IRQ("pmu", 24, 209),
TEGRA_WAKE_GPIO("power", 29, 1, TEGRA186_AON_GPIO(FF, 0)),
TEGRA_WAKE_IRQ("rtc", 73, 10),
};
@ -3325,6 +3327,7 @@ static const char * const tegra194_reset_sources[] = {
};
static const struct tegra_wake_event tegra194_wake_events[] = {
TEGRA_WAKE_IRQ("pmu", 24, 209),
TEGRA_WAKE_GPIO("power", 29, 1, TEGRA194_AON_GPIO(EE, 4)),
TEGRA_WAKE_IRQ("rtc", 73, 10),
};