mirror of https://gitee.com/openkylin/linux.git
soc/tegra: Changes for v5.8-rc1
Enables Tegra210, Tegra186 and Tegra194 to be woken from suspend by the PMIC and exports a bit more information about SoCs via sysfs. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl7HzTsTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoXlpD/42/AZYEXVi97CW5oxgsZjtf6xIsDuW v64DtfKFNcgDVqAPpqZRv+Q4OmxJsq7PaUPFxR8KA2TCVmqh8RHKDvjpenrA/A/9 QcJ1XlAsBvWLwNkskMSb4jvohEjZ1fh13KJeqHifF7FtRAGEnf8s4MDitPBcRGXz 2NgnhoxSElwfjptmd1Z/7ZsK1Zmjgr8CEKAtr7bhrB4rOZRtRsYgF1Diw/qZKCh/ u+KBijvS7XUXS34ZTzHYw95YsKKy/mfk5F3yea9cgK6/9SuxAFUV+cKlAFMlt1bE yadgJxcXxoapgMaOvtdKaiR6HZWU4mq0xyDKBQ/3AQL0ZWmbv1OUD9i7I6VtQBOi tmQb+2GAafROYymshLZDInjIQhdVUAKLaeNiOerYPI++n5INh2bx+ppxjvcO1zjo xkI7FxHAvQm2RBUEEIonlJObwyPya7fgp9mSEOFzqcWCryH6ggGiI4+q3wo67u9z 7QuTrxSx0Ao1SCsdP01o+XdJraI1BKTKbxELiis8eTupd/BcikkMUhCXMBVvU5uY zDx+5hZk3cyhDEPaaJB+kexEqv0A5CDwo1Z0fvf5pYy+aQzawy57tDi5QMm3QvUn V6W1Sf90LQmwLFAB+MS1Yu7gw3U6Y86c5q7H5+3wAmz8iu334JDbDl4wJ7VGPMb3 wCMu/50QlOy0sg== =EmGZ -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.8-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers soc/tegra: Changes for v5.8-rc1 Enables Tegra210, Tegra186 and Tegra194 to be woken from suspend by the PMIC and exports a bit more information about SoCs via sysfs. * tag 'tegra-for-5.8-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Enable PMIC wake event on Tegra210 soc: tegra: Fix tegra_pmc_get_suspend_mode definition soc/tegra: pmc: Enable PMIC wake event on Tegra194 soc/tegra: pmc: Select GENERIC_PINCONF soc/tegra: fuse: Update the SoC revision attribute to display a name soc/tegra: fuse: Trivial clean-up of tegra_init_revision() soc/tegra: fuse: Add custom SoC attributes soc/tegra: pmc: Enable PMIC wake event on Tegra186 Link: https://lore.kernel.org/r/20200522142846.2376224-2-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
e26552c5e0
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@ -133,6 +133,7 @@ config SOC_TEGRA_FLOWCTRL
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config SOC_TEGRA_PMC
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bool
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select GENERIC_PINCONF
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config SOC_TEGRA_POWERGATE_BPMP
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def_bool y
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@ -300,6 +300,59 @@ static void tegra_enable_fuse_clk(void __iomem *base)
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writel(reg, base + 0x14);
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}
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static ssize_t major_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%d\n", tegra_get_major_rev());
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}
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static DEVICE_ATTR_RO(major);
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static ssize_t minor_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%d\n", tegra_get_minor_rev());
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}
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static DEVICE_ATTR_RO(minor);
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static struct attribute *tegra_soc_attr[] = {
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&dev_attr_major.attr,
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&dev_attr_minor.attr,
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NULL,
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};
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const struct attribute_group tegra_soc_attr_group = {
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.attrs = tegra_soc_attr,
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};
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#ifdef CONFIG_ARCH_TEGRA_194_SOC
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static ssize_t platform_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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/*
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* Displays the value in the 'pre_si_platform' field of the HIDREV
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* register for Tegra194 devices. A value of 0 indicates that the
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* platform type is silicon and all other non-zero values indicate
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* the type of simulation platform is being used.
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*/
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return sprintf(buf, "%d\n", (tegra_read_chipid() >> 20) & 0xf);
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}
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static DEVICE_ATTR_RO(platform);
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static struct attribute *tegra194_soc_attr[] = {
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&dev_attr_major.attr,
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&dev_attr_minor.attr,
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&dev_attr_platform.attr,
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NULL,
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};
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const struct attribute_group tegra194_soc_attr_group = {
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.attrs = tegra194_soc_attr,
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};
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#endif
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struct device * __init tegra_soc_device_register(void)
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{
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struct soc_device_attribute *attr;
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@ -310,8 +363,10 @@ struct device * __init tegra_soc_device_register(void)
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return NULL;
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attr->family = kasprintf(GFP_KERNEL, "Tegra");
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attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_sku_info.revision);
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attr->revision = kasprintf(GFP_KERNEL, "%s",
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tegra_revision_name[tegra_sku_info.revision]);
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attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id());
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attr->custom_attr_group = fuse->soc->soc_attr_group;
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dev = soc_device_register(attr);
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if (IS_ERR(dev)) {
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@ -164,4 +164,5 @@ const struct tegra_fuse_soc tegra20_fuse_soc = {
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.speedo_init = tegra20_init_speedo_data,
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.probe = tegra20_fuse_probe,
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.info = &tegra20_fuse_info,
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.soc_attr_group = &tegra_soc_attr_group,
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};
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@ -111,6 +111,7 @@ const struct tegra_fuse_soc tegra30_fuse_soc = {
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.init = tegra30_fuse_init,
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.speedo_init = tegra30_init_speedo_data,
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.info = &tegra30_fuse_info,
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.soc_attr_group = &tegra_soc_attr_group,
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};
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#endif
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@ -125,6 +126,7 @@ const struct tegra_fuse_soc tegra114_fuse_soc = {
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.init = tegra30_fuse_init,
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.speedo_init = tegra114_init_speedo_data,
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.info = &tegra114_fuse_info,
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.soc_attr_group = &tegra_soc_attr_group,
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};
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#endif
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@ -205,6 +207,7 @@ const struct tegra_fuse_soc tegra124_fuse_soc = {
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.info = &tegra124_fuse_info,
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.lookups = tegra124_fuse_lookups,
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.num_lookups = ARRAY_SIZE(tegra124_fuse_lookups),
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.soc_attr_group = &tegra_soc_attr_group,
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};
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#endif
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@ -290,6 +293,7 @@ const struct tegra_fuse_soc tegra210_fuse_soc = {
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.info = &tegra210_fuse_info,
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.lookups = tegra210_fuse_lookups,
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.num_lookups = ARRAY_SIZE(tegra210_fuse_lookups),
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.soc_attr_group = &tegra_soc_attr_group,
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};
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#endif
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@ -319,6 +323,7 @@ const struct tegra_fuse_soc tegra186_fuse_soc = {
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.info = &tegra186_fuse_info,
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.lookups = tegra186_fuse_lookups,
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.num_lookups = ARRAY_SIZE(tegra186_fuse_lookups),
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.soc_attr_group = &tegra_soc_attr_group,
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};
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#endif
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@ -348,5 +353,6 @@ const struct tegra_fuse_soc tegra194_fuse_soc = {
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.info = &tegra194_fuse_info,
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.lookups = tegra194_fuse_lookups,
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.num_lookups = ARRAY_SIZE(tegra194_fuse_lookups),
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.soc_attr_group = &tegra194_soc_attr_group,
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};
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#endif
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@ -32,6 +32,8 @@ struct tegra_fuse_soc {
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const struct nvmem_cell_lookup *lookups;
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unsigned int num_lookups;
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const struct attribute_group *soc_attr_group;
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};
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struct tegra_fuse {
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@ -64,6 +66,11 @@ void tegra_init_apbmisc(void);
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bool __init tegra_fuse_read_spare(unsigned int spare);
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u32 __init tegra_fuse_read_early(unsigned int offset);
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u8 tegra_get_major_rev(void);
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u8 tegra_get_minor_rev(void);
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extern const struct attribute_group tegra_soc_attr_group;
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#ifdef CONFIG_ARCH_TEGRA_2x_SOC
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void tegra20_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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@ -110,6 +117,7 @@ extern const struct tegra_fuse_soc tegra186_fuse_soc;
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#ifdef CONFIG_ARCH_TEGRA_194_SOC
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extern const struct tegra_fuse_soc tegra194_fuse_soc;
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extern const struct attribute_group tegra194_soc_attr_group;
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#endif
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#endif
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@ -37,6 +37,16 @@ u8 tegra_get_chip_id(void)
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return (tegra_read_chipid() >> 8) & 0xff;
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}
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u8 tegra_get_major_rev(void)
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{
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return (tegra_read_chipid() >> 4) & 0xf;
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}
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u8 tegra_get_minor_rev(void)
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{
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return (tegra_read_chipid() >> 16) & 0xf;
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}
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u32 tegra_read_straps(void)
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{
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WARN(!chipid, "Tegra ABP MISC not yet available\n");
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@ -65,36 +75,32 @@ static const struct of_device_id apbmisc_match[] __initconst = {
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void __init tegra_init_revision(void)
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{
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u32 id, chip_id, minor_rev;
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int rev;
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u8 chip_id, minor_rev;
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id = tegra_read_chipid();
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chip_id = (id >> 8) & 0xff;
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minor_rev = (id >> 16) & 0xf;
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chip_id = tegra_get_chip_id();
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minor_rev = tegra_get_minor_rev();
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switch (minor_rev) {
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case 1:
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rev = TEGRA_REVISION_A01;
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tegra_sku_info.revision = TEGRA_REVISION_A01;
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break;
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case 2:
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rev = TEGRA_REVISION_A02;
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tegra_sku_info.revision = TEGRA_REVISION_A02;
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break;
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case 3:
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if (chip_id == TEGRA20 && (tegra_fuse_read_spare(18) ||
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tegra_fuse_read_spare(19)))
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rev = TEGRA_REVISION_A03p;
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tegra_sku_info.revision = TEGRA_REVISION_A03p;
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else
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rev = TEGRA_REVISION_A03;
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tegra_sku_info.revision = TEGRA_REVISION_A03;
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break;
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case 4:
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rev = TEGRA_REVISION_A04;
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tegra_sku_info.revision = TEGRA_REVISION_A04;
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break;
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default:
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rev = TEGRA_REVISION_UNKNOWN;
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tegra_sku_info.revision = TEGRA_REVISION_UNKNOWN;
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}
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tegra_sku_info.revision = rev;
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tegra_sku_info.sku_id = tegra_fuse_read_early(FUSE_SKU_INFO);
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}
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@ -3063,6 +3063,7 @@ static const struct pinctrl_pin_desc tegra210_pin_descs[] = {
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static const struct tegra_wake_event tegra210_wake_events[] = {
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TEGRA_WAKE_IRQ("rtc", 16, 2),
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TEGRA_WAKE_IRQ("pmu", 51, 86),
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};
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static const struct tegra_pmc_soc tegra210_pmc_soc = {
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}
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static const struct tegra_wake_event tegra186_wake_events[] = {
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TEGRA_WAKE_IRQ("pmu", 24, 209),
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TEGRA_WAKE_GPIO("power", 29, 1, TEGRA186_AON_GPIO(FF, 0)),
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TEGRA_WAKE_IRQ("rtc", 73, 10),
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};
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};
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static const struct tegra_wake_event tegra194_wake_events[] = {
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TEGRA_WAKE_IRQ("pmu", 24, 209),
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TEGRA_WAKE_GPIO("power", 29, 1, TEGRA194_AON_GPIO(EE, 4)),
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TEGRA_WAKE_IRQ("rtc", 73, 10),
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};
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