i.MX defconfig update for 5.4:

- Enable pinctrl and clock driver support for i.MX8MN SoC.
  - Enable SDMA support for i.MX8MQ and i.MX8MM SoC, including
    FW_LOADER_USER_HELPER and FW_LOADER_USER_HELPER_FALLBACK to support
    SDMA firmware loading via udev.
  - Enable module build of i.MX8 DDR PMU driver and ETNAVIV GPU driver.
  - Enable module build of OV5645 camera driver in imx_v6_v7_defconfig.
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Merge tag 'imx-defconfig-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig

i.MX defconfig update for 5.4:
 - Enable pinctrl and clock driver support for i.MX8MN SoC.
 - Enable SDMA support for i.MX8MQ and i.MX8MM SoC, including
   FW_LOADER_USER_HELPER and FW_LOADER_USER_HELPER_FALLBACK to support
   SDMA firmware loading via udev.
 - Enable module build of i.MX8 DDR PMU driver and ETNAVIV GPU driver.
 - Enable module build of OV5645 camera driver in imx_v6_v7_defconfig.

* tag 'imx-defconfig-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: defconfig: CONFIG_DRM_ETNAVIV=m
  ARM: imx_v6_v7_defconfig: Select the OV5645 camera driver
  arm64: defconfig: Build imx8 ddr pmu as module
  arm64: defconfig: Select CONFIG_CLK_IMX8MN by default
  arm64: defconfig: Select CONFIG_PINCTRL_IMX8MN by default
  arm64: defconfig: Enable SDMA on i.mx8mq/8mm

Link: https://lore.kernel.org/r/20190825153237.28829-7-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2019-09-03 19:00:09 +02:00
commit e29de963e8
2 changed files with 8 additions and 0 deletions

View File

@ -273,6 +273,7 @@ CONFIG_VIDEO_IMX_PXP=y
CONFIG_VIDEO_ADV7180=m
CONFIG_VIDEO_OV2680=m
CONFIG_VIDEO_OV5640=m
CONFIG_VIDEO_OV5645=m
CONFIG_IMX_IPUV3_CORE=y
CONFIG_DRM=y
CONFIG_DRM_PANEL_LVDS=y

View File

@ -198,6 +198,8 @@ CONFIG_PCIE_HISI_STB=y
CONFIG_PCIE_TEGRA194=m
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER_USER_HELPER=y
CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
CONFIG_HISILICON_LPC=y
CONFIG_SIMPLE_PM_BUS=y
CONFIG_MTD=y
@ -394,6 +396,7 @@ CONFIG_SPMI=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_PINCTRL_MAX77620=y
CONFIG_PINCTRL_IMX8MM=y
CONFIG_PINCTRL_IMX8MN=y
CONFIG_PINCTRL_IMX8MQ=y
CONFIG_PINCTRL_IMX8QXP=y
CONFIG_PINCTRL_IPQ8074=y
@ -535,6 +538,7 @@ CONFIG_DRM_PANEL_SIMPLE=m
CONFIG_DRM_SII902X=m
CONFIG_DRM_I2C_ADV7511=m
CONFIG_DRM_VC4=m
CONFIG_DRM_ETNAVIV=m
CONFIG_DRM_HISI_HIBMC=m
CONFIG_DRM_HISI_KIRIN=m
CONFIG_DRM_MESON=m
@ -656,6 +660,7 @@ CONFIG_DMADEVICES=y
CONFIG_FSL_EDMA=y
CONFIG_DMA_BCM2835=m
CONFIG_DMA_SUN6I=m
CONFIG_IMX_SDMA=y
CONFIG_K3_DMA=y
CONFIG_MV_XOR=y
CONFIG_MV_XOR_V2=y
@ -682,6 +687,7 @@ CONFIG_COMMON_CLK_S2MPS11=y
CONFIG_CLK_QORIQ=y
CONFIG_COMMON_CLK_PWM=y
CONFIG_CLK_IMX8MM=y
CONFIG_CLK_IMX8MN=y
CONFIG_CLK_IMX8MQ=y
CONFIG_CLK_IMX8QXP=y
CONFIG_TI_SCI_CLK=y
@ -785,6 +791,7 @@ CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PHY_UNIPHIER_USB2=y
CONFIG_PHY_UNIPHIER_USB3=y
CONFIG_PHY_TEGRA_XUSB=y
CONFIG_FSL_IMX8_DDR_PMU=m
CONFIG_HISI_PMU=y
CONFIG_QCOM_L2_PMU=y
CONFIG_QCOM_L3_PMU=y