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arm64: dts: renesas: r8a774a1: Add audio support
Add sound support for the RZ/G2M SoC (a.k.a. R8A774A1). This work is based on similar work done on the R8A7796 SoC by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Biju Das
Simon Horman
parent
9567a85668
commit
e2f04248fc
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@ -1045,6 +1045,281 @@ msiof3: spi@e6c10000 {
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status = "disabled";
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};
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rcar_sound: sound@ec500000 {
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/*
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* #sound-dai-cells is required
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*
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* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
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* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
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*/
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/*
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* #clock-cells is required for audio_clkout0/1/2/3
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*
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* clkout : #clock-cells = <0>; <&rcar_sound>;
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* clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
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*/
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compatible = "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
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reg = <0 0xec500000 0 0x1000>, /* SCU */
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<0 0xec5a0000 0 0x100>, /* ADG */
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<0 0xec540000 0 0x1000>, /* SSIU */
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<0 0xec541000 0 0x280>, /* SSI */
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<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
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reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
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clocks = <&cpg CPG_MOD 1005>,
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<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
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<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
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<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
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<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
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<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
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<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
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<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
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<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
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<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
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<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
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<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
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<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
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<&audio_clk_a>, <&audio_clk_b>,
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<&audio_clk_c>,
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<&cpg CPG_CORE 10>;
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clock-names = "ssi-all",
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"ssi.9", "ssi.8", "ssi.7", "ssi.6",
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"ssi.5", "ssi.4", "ssi.3", "ssi.2",
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"ssi.1", "ssi.0",
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"src.9", "src.8", "src.7", "src.6",
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"src.5", "src.4", "src.3", "src.2",
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"src.1", "src.0",
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"mix.1", "mix.0",
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"ctu.1", "ctu.0",
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"dvc.0", "dvc.1",
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"clk_a", "clk_b", "clk_c", "clk_i";
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power-domains = <&sysc 32>;
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resets = <&cpg 1005>,
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<&cpg 1006>, <&cpg 1007>,
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<&cpg 1008>, <&cpg 1009>,
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<&cpg 1010>, <&cpg 1011>,
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<&cpg 1012>, <&cpg 1013>,
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<&cpg 1014>, <&cpg 1015>;
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reset-names = "ssi-all",
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"ssi.9", "ssi.8", "ssi.7", "ssi.6",
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"ssi.5", "ssi.4", "ssi.3", "ssi.2",
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"ssi.1", "ssi.0";
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status = "disabled";
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rcar_sound,dvc {
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dvc0: dvc-0 {
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dmas = <&audma1 0xbc>;
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dma-names = "tx";
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};
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dvc1: dvc-1 {
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dmas = <&audma1 0xbe>;
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dma-names = "tx";
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};
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};
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rcar_sound,mix {
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mix0: mix-0 { };
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mix1: mix-1 { };
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};
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rcar_sound,ctu {
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ctu00: ctu-0 { };
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ctu01: ctu-1 { };
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ctu02: ctu-2 { };
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ctu03: ctu-3 { };
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ctu10: ctu-4 { };
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ctu11: ctu-5 { };
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ctu12: ctu-6 { };
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ctu13: ctu-7 { };
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};
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rcar_sound,src {
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src0: src-0 {
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interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x85>, <&audma1 0x9a>;
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dma-names = "rx", "tx";
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};
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src1: src-1 {
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interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x87>, <&audma1 0x9c>;
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dma-names = "rx", "tx";
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};
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src2: src-2 {
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interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x89>, <&audma1 0x9e>;
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dma-names = "rx", "tx";
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};
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src3: src-3 {
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interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x8b>, <&audma1 0xa0>;
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dma-names = "rx", "tx";
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};
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src4: src-4 {
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interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x8d>, <&audma1 0xb0>;
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dma-names = "rx", "tx";
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};
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src5: src-5 {
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interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x8f>, <&audma1 0xb2>;
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dma-names = "rx", "tx";
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};
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src6: src-6 {
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interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x91>, <&audma1 0xb4>;
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dma-names = "rx", "tx";
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};
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src7: src-7 {
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interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x93>, <&audma1 0xb6>;
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dma-names = "rx", "tx";
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};
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src8: src-8 {
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interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x95>, <&audma1 0xb8>;
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dma-names = "rx", "tx";
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};
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src9: src-9 {
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interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x97>, <&audma1 0xba>;
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dma-names = "rx", "tx";
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};
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};
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rcar_sound,ssi {
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ssi0: ssi-0 {
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interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi1: ssi-1 {
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interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi2: ssi-2 {
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interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi3: ssi-3 {
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interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi4: ssi-4 {
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interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi5: ssi-5 {
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interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi6: ssi-6 {
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interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi7: ssi-7 {
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interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi8: ssi-8 {
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interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi9: ssi-9 {
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interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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};
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port@1 {
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reg = <1>;
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};
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};
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};
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audma0: dma-controller@ec700000 {
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compatible = "renesas,dmac-r8a774a1",
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"renesas,rcar-dmac";
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reg = <0 0xec700000 0 0x10000>;
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interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&cpg CPG_MOD 502>;
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clock-names = "fck";
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power-domains = <&sysc 32>;
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resets = <&cpg 502>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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audma1: dma-controller@ec720000 {
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compatible = "renesas,dmac-r8a774a1",
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"renesas,rcar-dmac";
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reg = <0 0xec720000 0 0x10000>;
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interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&cpg CPG_MOD 501>;
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clock-names = "fck";
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power-domains = <&sysc 32>;
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resets = <&cpg 501>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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sdhi0: sd@ee100000 {
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compatible = "renesas,sdhi-r8a774a1",
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"renesas,rcar-gen3-sdhi";
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