mirror of https://gitee.com/openkylin/linux.git
drm/nvc0-/ltcg: implement VRAM compression
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Christoph Bumiller
Ben Skeggs
parent
de7b7d59d5
commit
e30441adb9
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@ -4,8 +4,15 @@
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#include <core/subdev.h>
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#include <core/device.h>
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struct nouveau_mm_node;
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struct nouveau_ltcg {
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struct nouveau_subdev base;
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int (*tags_alloc)(struct nouveau_ltcg *, u32 count,
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struct nouveau_mm_node **);
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void (*tags_free)(struct nouveau_ltcg *, struct nouveau_mm_node **);
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void (*tags_clear)(struct nouveau_ltcg *, u32 first, u32 count);
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};
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static inline struct nouveau_ltcg *
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@ -23,6 +23,7 @@
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*/
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#include <subdev/fb.h>
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#include <subdev/ltcg.h>
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#include <subdev/bios.h>
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struct nvc0_fb_priv {
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@ -31,34 +32,14 @@ struct nvc0_fb_priv {
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dma_addr_t r100c10;
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};
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/* 0 = unsupported
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* 1 = non-compressed
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* 3 = compressed
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*/
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static const u8 types[256] = {
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1, 1, 3, 3, 3, 3, 0, 3, 3, 3, 3, 0, 0, 0, 0, 0,
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0, 1, 0, 0, 0, 0, 0, 3, 3, 3, 3, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 3, 3, 3, 3, 3,
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3, 3, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 3, 3, 3, 3, 0, 1, 1, 1, 1, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 3, 3, 3, 3, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3,
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3, 3, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 3, 3, 3, 3,
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3, 3, 0, 0, 0, 0, 0, 0, 3, 0, 0, 3, 0, 3, 0, 3,
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3, 0, 3, 3, 3, 3, 3, 0, 0, 3, 0, 3, 0, 3, 3, 0,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 0, 1, 1, 0
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};
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extern const u8 nvc0_pte_storage_type_map[256];
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static bool
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nvc0_fb_memtype_valid(struct nouveau_fb *pfb, u32 tile_flags)
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{
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u8 memtype = (tile_flags & 0x0000ff00) >> 8;
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return likely((types[memtype] == 1));
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return likely((nvc0_pte_storage_type_map[memtype] != 0xff));
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}
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static int
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@ -130,6 +111,7 @@ nvc0_fb_vram_new(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin,
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int type = (memtype & 0x0ff);
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int back = (memtype & 0x800);
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int ret;
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const bool comp = nvc0_pte_storage_type_map[type] != type;
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size >>= 12;
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align >>= 12;
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@ -142,10 +124,22 @@ nvc0_fb_vram_new(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin,
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return -ENOMEM;
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INIT_LIST_HEAD(&mem->regions);
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mem->memtype = type;
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mem->size = size;
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mutex_lock(&pfb->base.mutex);
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if (comp) {
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struct nouveau_ltcg *ltcg = nouveau_ltcg(pfb->base.base.parent);
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/* compression only works with lpages */
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if (align == (1 << (17 - 12))) {
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int n = size >> 5;
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ltcg->tags_alloc(ltcg, n, &mem->tag);
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}
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if (unlikely(!mem->tag))
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type = nvc0_pte_storage_type_map[type];
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}
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mem->memtype = type;
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do {
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if (back)
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ret = nouveau_mm_tail(mm, 1, size, ncmin, align, &r);
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@ -168,6 +162,17 @@ nvc0_fb_vram_new(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin,
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return 0;
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}
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static void
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nvc0_fb_vram_del(struct nouveau_fb *pfb, struct nouveau_mem **pmem)
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{
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struct nouveau_ltcg *ltcg = nouveau_ltcg(pfb->base.base.parent);
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if ((*pmem)->tag)
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ltcg->tags_free(ltcg, &(*pmem)->tag);
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nv50_fb_vram_del(pfb, pmem);
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}
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static int
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nvc0_fb_init(struct nouveau_object *object)
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{
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@ -215,7 +220,7 @@ nvc0_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
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priv->base.memtype_valid = nvc0_fb_memtype_valid;
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priv->base.ram.init = nvc0_fb_vram_init;
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priv->base.ram.get = nvc0_fb_vram_new;
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priv->base.ram.put = nv50_fb_vram_del;
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priv->base.ram.put = nvc0_fb_vram_del;
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priv->r100c10_page = alloc_page(GFP_KERNEL | __GFP_ZERO);
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if (priv->r100c10_page) {
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@ -23,10 +23,17 @@
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*/
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#include <subdev/ltcg.h>
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#include <subdev/fb.h>
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#include <subdev/timer.h>
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struct nvc0_ltcg_priv {
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struct nouveau_ltcg base;
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u32 part_nr;
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u32 part_mask;
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u32 subp_nr;
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struct nouveau_mm tags;
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u32 num_tags;
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struct nouveau_mm_node *tag_ram;
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};
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static void
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@ -61,12 +68,105 @@ nvc0_ltcg_intr(struct nouveau_subdev *subdev)
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nv_mask(priv, 0x000640, 0x02000000, 0x00000000);
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}
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static int
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nvc0_ltcg_tags_alloc(struct nouveau_ltcg *ltcg, u32 n,
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struct nouveau_mm_node **pnode)
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{
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struct nvc0_ltcg_priv *priv = (struct nvc0_ltcg_priv *)ltcg;
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int ret;
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ret = nouveau_mm_head(&priv->tags, 1, n, n, 1, pnode);
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if (ret)
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*pnode = NULL;
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return ret;
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}
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static void
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nvc0_ltcg_tags_free(struct nouveau_ltcg *ltcg, struct nouveau_mm_node **pnode)
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{
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struct nvc0_ltcg_priv *priv = (struct nvc0_ltcg_priv *)ltcg;
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nouveau_mm_free(&priv->tags, pnode);
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}
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static void
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nvc0_ltcg_tags_clear(struct nouveau_ltcg *ltcg, u32 first, u32 count)
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{
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struct nvc0_ltcg_priv *priv = (struct nvc0_ltcg_priv *)ltcg;
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u32 last = first + count - 1;
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int p, i;
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BUG_ON((first > last) || (last >= priv->num_tags));
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nv_wr32(priv, 0x17e8cc, first);
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nv_wr32(priv, 0x17e8d0, last);
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nv_wr32(priv, 0x17e8c8, 0x4); /* trigger clear */
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/* wait until it's finished with clearing */
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for (p = 0; p < priv->part_nr; ++p) {
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if (!(priv->part_mask & (1 << p)))
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continue;
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for (i = 0; i < priv->subp_nr; ++i)
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nv_wait(priv, 0x1410c8 + p * 0x2000 + i * 0x400, ~0, 0);
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}
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}
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/* TODO: Figure out tag memory details and drop the over-cautious allocation.
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*/
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static int
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nvc0_ltcg_init_tag_ram(struct nouveau_fb *pfb, struct nvc0_ltcg_priv *priv)
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{
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u32 tag_size, tag_margin, tag_align;
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int ret;
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nv_wr32(priv, 0x17e8d8, priv->part_nr);
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/* tags for 1/4 of VRAM should be enough (8192/4 per GiB of VRAM) */
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priv->num_tags = (pfb->ram.size >> 17) / 4;
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if (priv->num_tags > (1 << 17))
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priv->num_tags = 1 << 17; /* we have 17 bits in PTE */
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priv->num_tags = (priv->num_tags + 63) & ~63; /* round up to 64 */
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tag_align = priv->part_nr * 0x800;
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tag_margin = (tag_align < 0x6000) ? 0x6000 : tag_align;
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/* 4 part 4 sub: 0x2000 bytes for 56 tags */
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/* 3 part 4 sub: 0x6000 bytes for 168 tags */
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/*
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* About 147 bytes per tag. Let's be safe and allocate x2, which makes
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* 0x4980 bytes for 64 tags, and round up to 0x6000 bytes for 64 tags.
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*
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* For 4 GiB of memory we'll have 8192 tags which makes 3 MiB, < 0.1 %.
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*/
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tag_size = (priv->num_tags / 64) * 0x6000 + tag_margin;
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tag_size += tag_align;
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tag_size = (tag_size + 0xfff) >> 12; /* round up */
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ret = nouveau_mm_tail(&pfb->vram, 0, tag_size, tag_size, 1,
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&priv->tag_ram);
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if (ret) {
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priv->num_tags = 0;
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} else {
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u64 tag_base = (priv->tag_ram->offset << 12) + tag_margin;
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tag_base += tag_align - 1;
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tag_base /= tag_align;
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nv_wr32(priv, 0x17e8d4, tag_base);
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}
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ret = nouveau_mm_init(&priv->tags, 0, priv->num_tags, 1);
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return ret;
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}
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static int
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nvc0_ltcg_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
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struct nouveau_oclass *oclass, void *data, u32 size,
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struct nouveau_object **pobject)
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{
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struct nvc0_ltcg_priv *priv;
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struct nouveau_fb *pfb = nouveau_fb(parent);
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int ret;
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ret = nouveau_ltcg_create(parent, engine, oclass, &priv);
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@ -74,19 +174,44 @@ nvc0_ltcg_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
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if (ret)
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return ret;
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priv->subp_nr = nv_rd32(priv, 0x17e8dc) >> 24;
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priv->part_nr = nv_rd32(priv, 0x022438);
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priv->part_mask = nv_rd32(priv, 0x022554);
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priv->subp_nr = nv_rd32(priv, 0x17e8dc) >> 28;
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nv_mask(priv, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */
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ret = nvc0_ltcg_init_tag_ram(pfb, priv);
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if (ret)
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return ret;
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priv->base.tags_alloc = nvc0_ltcg_tags_alloc;
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priv->base.tags_free = nvc0_ltcg_tags_free;
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priv->base.tags_clear = nvc0_ltcg_tags_clear;
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nv_subdev(priv)->intr = nvc0_ltcg_intr;
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return 0;
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}
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static void
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nvc0_ltcg_dtor(struct nouveau_object *object)
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{
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struct nouveau_ltcg *ltcg = (struct nouveau_ltcg *)object;
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struct nvc0_ltcg_priv *priv = (struct nvc0_ltcg_priv *)ltcg;
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struct nouveau_fb *pfb = nouveau_fb(ltcg->base.base.parent);
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nouveau_mm_fini(&priv->tags);
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nouveau_mm_free(&pfb->vram, &priv->tag_ram);
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nouveau_ltcg_destroy(ltcg);
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}
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struct nouveau_oclass
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nvc0_ltcg_oclass = {
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.handle = NV_SUBDEV(LTCG, 0xc0),
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.ofuncs = &(struct nouveau_ofuncs) {
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.ctor = nvc0_ltcg_ctor,
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.dtor = _nouveau_ltcg_dtor,
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.dtor = nvc0_ltcg_dtor,
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.init = _nouveau_ltcg_init,
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.fini = _nouveau_ltcg_fini,
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},
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@ -28,12 +28,54 @@
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#include <subdev/timer.h>
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#include <subdev/fb.h>
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#include <subdev/vm.h>
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#include <subdev/ltcg.h>
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struct nvc0_vmmgr_priv {
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struct nouveau_vmmgr base;
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spinlock_t lock;
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};
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/* Map from compressed to corresponding uncompressed storage type.
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* The value 0xff represents an invalid storage type.
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*/
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const u8 nvc0_pte_storage_type_map[256] =
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{
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0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0xff, 0x01, /* 0x00 */
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0x01, 0x01, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0x11, 0xff, 0xff, 0xff, 0xff, 0xff, 0x11, /* 0x10 */
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0x11, 0x11, 0x11, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x26, 0x27, /* 0x20 */
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0x28, 0x29, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x30 */
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0xff, 0xff, 0x26, 0x27, 0x28, 0x29, 0x26, 0x27,
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0x28, 0x29, 0xff, 0xff, 0xff, 0xff, 0x46, 0xff, /* 0x40 */
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0x46, 0x46, 0x46, 0x46, 0xff, 0xff, 0xff, /* 0x50 */
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x60 */
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x70 */
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0xff, 0xff, 0xff, 0x7b, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7b, 0x7b, /* 0x80 */
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0x7b, 0x7b, 0xff, 0x8b, 0x8c, 0x8d, 0x8e, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x90 */
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0x8b, 0x8c, 0x8d, 0x8e, 0xa7, /* 0xa0 */
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0xa8, 0xa9, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0xb0 */
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xa7,
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0xa8, 0xa9, 0xaa, 0xc3, 0xff, 0xff, 0xff, 0xff, /* 0xc0 */
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0xff, 0xff, 0xff, 0xff, 0xfe, 0xfe, 0xc3, 0xc3,
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0xc3, 0xc3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0xd0 */
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0xfe, 0xff, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe,
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0xfe, 0xff, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xff, /* 0xe0 */
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0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, 0xfe, 0xff,
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0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, /* 0xf0 */
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0xfe, 0xfe, 0xfe, 0xfe, 0xff, 0xfd, 0xfe, 0xff
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};
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static void
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nvc0_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 index,
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struct nouveau_gpuobj *pgt[2])
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@ -68,10 +110,20 @@ static void
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nvc0_vm_map(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
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struct nouveau_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta)
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{
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u32 next = 1 << (vma->node->type - 8);
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u64 next = 1 << (vma->node->type - 8);
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phys = nvc0_vm_addr(vma, phys, mem->memtype, 0);
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pte <<= 3;
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if (mem->tag) {
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struct nouveau_ltcg *ltcg =
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nouveau_ltcg(vma->vm->vmm->base.base.parent);
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u32 tag = mem->tag->offset + (delta >> 17);
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phys |= (u64)tag << (32 + 12);
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next |= (u64)1 << (32 + 12);
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ltcg->tags_clear(ltcg, tag, cnt);
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}
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while (cnt--) {
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nv_wo32(pgt, pte + 0, lower_32_bits(phys));
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nv_wo32(pgt, pte + 4, upper_32_bits(phys));
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@ -85,10 +137,12 @@ nvc0_vm_map_sg(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
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struct nouveau_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
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{
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u32 target = (vma->access & NV_MEM_ACCESS_NOSNOOP) ? 7 : 5;
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/* compressed storage types are invalid for system memory */
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u32 memtype = nvc0_pte_storage_type_map[mem->memtype & 0xff];
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||||
pte <<= 3;
|
||||
while (cnt--) {
|
||||
u64 phys = nvc0_vm_addr(vma, *list++, mem->memtype, target);
|
||||
u64 phys = nvc0_vm_addr(vma, *list++, memtype, target);
|
||||
nv_wo32(pgt, pte + 0, lower_32_bits(phys));
|
||||
nv_wo32(pgt, pte + 4, upper_32_bits(phys));
|
||||
pte += 8;
|
||||
|
|
|
|||
Loading…
Reference in New Issue