mirror of https://gitee.com/openkylin/linux.git
mlx5-fixes-2020-05-22
-----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEGhZs6bAKwk/OTgTpSD+KveBX+j4FAl7IbksACgkQSD+KveBX +j5T8Af/XT6b23VlSn2Km4tg8WQNDRJLdq1s6fTS5SGcyc0awxfH07cvYvJ26kKW kmdDNijkVbd0ma2UxHiiD3vmE8Vs85gZ6BDNyl485x/cH3zFzAm54R5fZdnK5JgN YNgdFP0MOwPtAdDtxLH+r8aOyNKncIOmCZrMNnxVgI+IytG1L5QLnS6GeQy2zyIx 9F/9sihta2z567IstGu2wvmgviSHVk/zV9yqn/orD9tV6oFvvrBQMlEt8l27b1tA 4bajbHIyc1WmfQ+wg56eXATdbqCQ2YYfMjhchiCfFv5DhnMnPi5bV0PNR9Rq0CYw 05xpF16/85uvDbTizsgGNZ1Pb1nGsQ== =oFWF -----END PGP SIGNATURE----- Merge tag 'mlx5-fixes-2020-05-22' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5 fixes 2020-05-22 This series introduces some fixes to mlx5 driver. Please pull and let me know if there is any problem. For -stable v4.13 ('net/mlx5: Add command entry handling completion') For -stable v5.2 ('net/mlx5: Fix error flow in case of function_setup failure') ('net/mlx5: Fix memory leak in mlx5_events_init') For -stable v5.3 ('net/mlx5e: Update netdev txq on completions during closure') ('net/mlx5e: kTLS, Destroy key object after destroying the TIS') ('net/mlx5e: Fix inner tirs handling') For -stable v5.6 ('net/mlx5: Fix cleaning unmanaged flow tables') ('net/mlx5: Fix a race when moving command interface to events mode') ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
e3181e9a72
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@ -848,6 +848,14 @@ static void free_msg(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *msg);
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static void mlx5_free_cmd_msg(struct mlx5_core_dev *dev,
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struct mlx5_cmd_msg *msg);
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static bool opcode_allowed(struct mlx5_cmd *cmd, u16 opcode)
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{
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if (cmd->allowed_opcode == CMD_ALLOWED_OPCODE_ALL)
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return true;
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return cmd->allowed_opcode == opcode;
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}
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static void cmd_work_handler(struct work_struct *work)
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{
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struct mlx5_cmd_work_ent *ent = container_of(work, struct mlx5_cmd_work_ent, work);
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@ -861,6 +869,7 @@ static void cmd_work_handler(struct work_struct *work)
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int alloc_ret;
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int cmd_mode;
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complete(&ent->handling);
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sem = ent->page_queue ? &cmd->pages_sem : &cmd->sem;
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down(sem);
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if (!ent->page_queue) {
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@ -913,7 +922,9 @@ static void cmd_work_handler(struct work_struct *work)
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/* Skip sending command to fw if internal error */
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if (pci_channel_offline(dev->pdev) ||
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dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
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dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR ||
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cmd->state != MLX5_CMDIF_STATE_UP ||
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!opcode_allowed(&dev->cmd, ent->op)) {
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u8 status = 0;
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u32 drv_synd;
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@ -978,6 +989,11 @@ static int wait_func(struct mlx5_core_dev *dev, struct mlx5_cmd_work_ent *ent)
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struct mlx5_cmd *cmd = &dev->cmd;
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int err;
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if (!wait_for_completion_timeout(&ent->handling, timeout) &&
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cancel_work_sync(&ent->work)) {
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ent->ret = -ECANCELED;
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goto out_err;
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}
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if (cmd->mode == CMD_MODE_POLLING || ent->polling) {
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wait_for_completion(&ent->done);
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} else if (!wait_for_completion_timeout(&ent->done, timeout)) {
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@ -985,12 +1001,17 @@ static int wait_func(struct mlx5_core_dev *dev, struct mlx5_cmd_work_ent *ent)
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mlx5_cmd_comp_handler(dev, 1UL << ent->idx, true);
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}
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out_err:
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err = ent->ret;
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if (err == -ETIMEDOUT) {
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mlx5_core_warn(dev, "%s(0x%x) timeout. Will cause a leak of a command resource\n",
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mlx5_command_str(msg_to_opcode(ent->in)),
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msg_to_opcode(ent->in));
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} else if (err == -ECANCELED) {
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mlx5_core_warn(dev, "%s(0x%x) canceled on out of queue timeout.\n",
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mlx5_command_str(msg_to_opcode(ent->in)),
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msg_to_opcode(ent->in));
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}
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mlx5_core_dbg(dev, "err %d, delivery status %s(%d)\n",
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err, deliv_status_to_str(ent->status), ent->status);
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@ -1026,6 +1047,7 @@ static int mlx5_cmd_invoke(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *in,
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ent->token = token;
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ent->polling = force_polling;
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init_completion(&ent->handling);
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if (!callback)
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init_completion(&ent->done);
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@ -1045,6 +1067,8 @@ static int mlx5_cmd_invoke(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *in,
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err = wait_func(dev, ent);
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if (err == -ETIMEDOUT)
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goto out;
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if (err == -ECANCELED)
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goto out_free;
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ds = ent->ts2 - ent->ts1;
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op = MLX5_GET(mbox_in, in->first.data, opcode);
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@ -1391,6 +1415,22 @@ static void create_debugfs_files(struct mlx5_core_dev *dev)
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mlx5_cmdif_debugfs_init(dev);
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}
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void mlx5_cmd_allowed_opcode(struct mlx5_core_dev *dev, u16 opcode)
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{
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struct mlx5_cmd *cmd = &dev->cmd;
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int i;
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for (i = 0; i < cmd->max_reg_cmds; i++)
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down(&cmd->sem);
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down(&cmd->pages_sem);
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cmd->allowed_opcode = opcode;
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up(&cmd->pages_sem);
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for (i = 0; i < cmd->max_reg_cmds; i++)
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up(&cmd->sem);
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}
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static void mlx5_cmd_change_mod(struct mlx5_core_dev *dev, int mode)
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{
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struct mlx5_cmd *cmd = &dev->cmd;
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@ -1667,12 +1707,14 @@ static int cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
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int err;
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u8 status = 0;
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u32 drv_synd;
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u16 opcode;
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u8 token;
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opcode = MLX5_GET(mbox_in, in, opcode);
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if (pci_channel_offline(dev->pdev) ||
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dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
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u16 opcode = MLX5_GET(mbox_in, in, opcode);
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dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR ||
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dev->cmd.state != MLX5_CMDIF_STATE_UP ||
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!opcode_allowed(&dev->cmd, opcode)) {
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err = mlx5_internal_err_ret_value(dev, opcode, &drv_synd, &status);
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MLX5_SET(mbox_out, out, status, status);
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MLX5_SET(mbox_out, out, syndrome, drv_synd);
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@ -1937,6 +1979,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
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goto err_free_page;
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}
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cmd->state = MLX5_CMDIF_STATE_DOWN;
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cmd->checksum_disabled = 1;
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cmd->max_reg_cmds = (1 << cmd->log_sz) - 1;
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cmd->bitmask = (1UL << cmd->max_reg_cmds) - 1;
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@ -1974,6 +2017,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
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mlx5_core_dbg(dev, "descriptor at dma 0x%llx\n", (unsigned long long)(cmd->dma));
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cmd->mode = CMD_MODE_POLLING;
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cmd->allowed_opcode = CMD_ALLOWED_OPCODE_ALL;
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create_msg_cache(dev);
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@ -2013,3 +2057,10 @@ void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
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dma_pool_destroy(cmd->pool);
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}
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EXPORT_SYMBOL(mlx5_cmd_cleanup);
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void mlx5_cmd_set_state(struct mlx5_core_dev *dev,
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enum mlx5_cmdif_state cmdif_state)
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{
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dev->cmd.state = cmdif_state;
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}
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EXPORT_SYMBOL(mlx5_cmd_set_state);
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@ -1121,7 +1121,7 @@ void mlx5e_close_drop_rq(struct mlx5e_rq *drop_rq);
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int mlx5e_create_indirect_rqt(struct mlx5e_priv *priv);
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int mlx5e_create_indirect_tirs(struct mlx5e_priv *priv, bool inner_ttc);
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void mlx5e_destroy_indirect_tirs(struct mlx5e_priv *priv, bool inner_ttc);
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void mlx5e_destroy_indirect_tirs(struct mlx5e_priv *priv);
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int mlx5e_create_direct_rqts(struct mlx5e_priv *priv, struct mlx5e_tir *tirs);
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void mlx5e_destroy_direct_rqts(struct mlx5e_priv *priv, struct mlx5e_tir *tirs);
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@ -699,6 +699,7 @@ mlx5_tc_ct_parse_match(struct mlx5e_priv *priv,
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struct netlink_ext_ack *extack)
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{
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struct mlx5_tc_ct_priv *ct_priv = mlx5_tc_ct_get_ct_priv(priv);
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struct flow_rule *rule = flow_cls_offload_flow_rule(f);
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struct flow_dissector_key_ct *mask, *key;
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bool trk, est, untrk, unest, new;
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u32 ctstate = 0, ctstate_mask = 0;
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@ -706,7 +707,7 @@ mlx5_tc_ct_parse_match(struct mlx5e_priv *priv,
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u16 ct_state, ct_state_mask;
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struct flow_match_ct match;
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if (!flow_rule_match_key(f->rule, FLOW_DISSECTOR_KEY_CT))
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if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CT))
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return 0;
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if (!ct_priv) {
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@ -715,7 +716,7 @@ mlx5_tc_ct_parse_match(struct mlx5e_priv *priv,
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return -EOPNOTSUPP;
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}
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flow_rule_match_ct(f->rule, &match);
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flow_rule_match_ct(rule, &match);
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key = match.key;
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mask = match.mask;
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@ -130,7 +130,9 @@ mlx5_tc_ct_parse_match(struct mlx5e_priv *priv,
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struct flow_cls_offload *f,
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struct netlink_ext_ack *extack)
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{
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if (!flow_rule_match_key(f->rule, FLOW_DISSECTOR_KEY_CT))
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struct flow_rule *rule = flow_cls_offload_flow_rule(f);
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if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CT))
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return 0;
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NL_SET_ERR_MSG_MOD(extack, "mlx5 tc ct offload isn't enabled.");
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@ -69,8 +69,8 @@ static void mlx5e_ktls_del(struct net_device *netdev,
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struct mlx5e_ktls_offload_context_tx *tx_priv =
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mlx5e_get_ktls_tx_priv_ctx(tls_ctx);
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mlx5_ktls_destroy_key(priv->mdev, tx_priv->key_id);
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mlx5e_destroy_tis(priv->mdev, tx_priv->tisn);
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mlx5_ktls_destroy_key(priv->mdev, tx_priv->key_id);
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kvfree(tx_priv);
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}
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@ -2717,7 +2717,8 @@ void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
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mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
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}
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if (!mlx5e_tunnel_inner_ft_supported(priv->mdev))
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/* Verify inner tirs resources allocated */
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if (!priv->inner_indir_tir[0].tirn)
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return;
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for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
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@ -3408,14 +3409,15 @@ int mlx5e_create_direct_tirs(struct mlx5e_priv *priv, struct mlx5e_tir *tirs)
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return err;
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}
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void mlx5e_destroy_indirect_tirs(struct mlx5e_priv *priv, bool inner_ttc)
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void mlx5e_destroy_indirect_tirs(struct mlx5e_priv *priv)
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{
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int i;
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for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++)
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mlx5e_destroy_tir(priv->mdev, &priv->indir_tir[i]);
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if (!inner_ttc || !mlx5e_tunnel_inner_ft_supported(priv->mdev))
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/* Verify inner tirs resources allocated */
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if (!priv->inner_indir_tir[0].tirn)
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return;
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for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++)
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@ -5123,7 +5125,7 @@ static int mlx5e_init_nic_rx(struct mlx5e_priv *priv)
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err_destroy_direct_tirs:
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mlx5e_destroy_direct_tirs(priv, priv->direct_tir);
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err_destroy_indirect_tirs:
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mlx5e_destroy_indirect_tirs(priv, true);
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mlx5e_destroy_indirect_tirs(priv);
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err_destroy_direct_rqts:
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mlx5e_destroy_direct_rqts(priv, priv->direct_tir);
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err_destroy_indirect_rqts:
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@ -5142,7 +5144,7 @@ static void mlx5e_cleanup_nic_rx(struct mlx5e_priv *priv)
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mlx5e_destroy_direct_tirs(priv, priv->xsk_tir);
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mlx5e_destroy_direct_rqts(priv, priv->xsk_tir);
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mlx5e_destroy_direct_tirs(priv, priv->direct_tir);
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mlx5e_destroy_indirect_tirs(priv, true);
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mlx5e_destroy_indirect_tirs(priv);
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mlx5e_destroy_direct_rqts(priv, priv->direct_tir);
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mlx5e_destroy_rqt(priv, &priv->indir_rqt);
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mlx5e_close_drop_rq(&priv->drop_rq);
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@ -1484,13 +1484,9 @@ bool mlx5e_eswitch_uplink_rep(struct net_device *netdev)
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return netdev->netdev_ops == &mlx5e_netdev_ops_uplink_rep;
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}
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bool mlx5e_eswitch_rep(struct net_device *netdev)
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bool mlx5e_eswitch_vf_rep(struct net_device *netdev)
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{
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if (netdev->netdev_ops == &mlx5e_netdev_ops_rep ||
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netdev->netdev_ops == &mlx5e_netdev_ops_uplink_rep)
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return true;
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return false;
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return netdev->netdev_ops == &mlx5e_netdev_ops_rep;
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}
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static void mlx5e_build_rep_params(struct net_device *netdev)
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|
@ -1747,7 +1743,7 @@ static int mlx5e_init_rep_rx(struct mlx5e_priv *priv)
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err_destroy_direct_tirs:
|
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mlx5e_destroy_direct_tirs(priv, priv->direct_tir);
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err_destroy_indirect_tirs:
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mlx5e_destroy_indirect_tirs(priv, false);
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mlx5e_destroy_indirect_tirs(priv);
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err_destroy_direct_rqts:
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mlx5e_destroy_direct_rqts(priv, priv->direct_tir);
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err_destroy_indirect_rqts:
|
||||
|
@ -1765,7 +1761,7 @@ static void mlx5e_cleanup_rep_rx(struct mlx5e_priv *priv)
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mlx5e_destroy_rep_root_ft(priv);
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mlx5e_destroy_ttc_table(priv, &priv->fs.ttc);
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mlx5e_destroy_direct_tirs(priv, priv->direct_tir);
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mlx5e_destroy_indirect_tirs(priv, false);
|
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mlx5e_destroy_indirect_tirs(priv);
|
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mlx5e_destroy_direct_rqts(priv, priv->direct_tir);
|
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mlx5e_destroy_rqt(priv, &priv->indir_rqt);
|
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mlx5e_close_drop_rq(&priv->drop_rq);
|
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|
|
|
@ -210,8 +210,13 @@ void mlx5e_rep_encap_entry_detach(struct mlx5e_priv *priv,
|
|||
|
||||
void mlx5e_rep_queue_neigh_stats_work(struct mlx5e_priv *priv);
|
||||
|
||||
bool mlx5e_eswitch_rep(struct net_device *netdev);
|
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bool mlx5e_eswitch_vf_rep(struct net_device *netdev);
|
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bool mlx5e_eswitch_uplink_rep(struct net_device *netdev);
|
||||
static inline bool mlx5e_eswitch_rep(struct net_device *netdev)
|
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{
|
||||
return mlx5e_eswitch_vf_rep(netdev) ||
|
||||
mlx5e_eswitch_uplink_rep(netdev);
|
||||
}
|
||||
|
||||
#else /* CONFIG_MLX5_ESWITCH */
|
||||
static inline bool mlx5e_is_uplink_rep(struct mlx5e_priv *priv) { return false; }
|
||||
|
|
|
@ -3073,6 +3073,11 @@ static bool actions_match_supported(struct mlx5e_priv *priv,
|
|||
return true;
|
||||
}
|
||||
|
||||
static bool same_port_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
|
||||
{
|
||||
return priv->mdev == peer_priv->mdev;
|
||||
}
|
||||
|
||||
static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
|
||||
{
|
||||
struct mlx5_core_dev *fmdev, *pmdev;
|
||||
|
@ -3291,7 +3296,7 @@ static inline int hash_encap_info(struct encap_key *key)
|
|||
}
|
||||
|
||||
|
||||
static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
|
||||
static bool is_merged_eswitch_vfs(struct mlx5e_priv *priv,
|
||||
struct net_device *peer_netdev)
|
||||
{
|
||||
struct mlx5e_priv *peer_priv;
|
||||
|
@ -3299,13 +3304,11 @@ static bool is_merged_eswitch_dev(struct mlx5e_priv *priv,
|
|||
peer_priv = netdev_priv(peer_netdev);
|
||||
|
||||
return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
|
||||
mlx5e_eswitch_rep(priv->netdev) &&
|
||||
mlx5e_eswitch_rep(peer_netdev) &&
|
||||
mlx5e_eswitch_vf_rep(priv->netdev) &&
|
||||
mlx5e_eswitch_vf_rep(peer_netdev) &&
|
||||
same_hw_devs(priv, peer_priv));
|
||||
}
|
||||
|
||||
|
||||
|
||||
bool mlx5e_encap_take(struct mlx5e_encap_entry *e)
|
||||
{
|
||||
return refcount_inc_not_zero(&e->refcnt);
|
||||
|
@ -3575,14 +3578,37 @@ static int add_vlan_pop_action(struct mlx5e_priv *priv,
|
|||
return err;
|
||||
}
|
||||
|
||||
static bool same_hw_reps(struct mlx5e_priv *priv,
|
||||
struct net_device *peer_netdev)
|
||||
{
|
||||
struct mlx5e_priv *peer_priv;
|
||||
|
||||
peer_priv = netdev_priv(peer_netdev);
|
||||
|
||||
return mlx5e_eswitch_rep(priv->netdev) &&
|
||||
mlx5e_eswitch_rep(peer_netdev) &&
|
||||
same_hw_devs(priv, peer_priv);
|
||||
}
|
||||
|
||||
static bool is_lag_dev(struct mlx5e_priv *priv,
|
||||
struct net_device *peer_netdev)
|
||||
{
|
||||
return ((mlx5_lag_is_sriov(priv->mdev) ||
|
||||
mlx5_lag_is_multipath(priv->mdev)) &&
|
||||
same_hw_reps(priv, peer_netdev));
|
||||
}
|
||||
|
||||
bool mlx5e_is_valid_eswitch_fwd_dev(struct mlx5e_priv *priv,
|
||||
struct net_device *out_dev)
|
||||
{
|
||||
if (is_merged_eswitch_dev(priv, out_dev))
|
||||
if (is_merged_eswitch_vfs(priv, out_dev))
|
||||
return true;
|
||||
|
||||
if (is_lag_dev(priv, out_dev))
|
||||
return true;
|
||||
|
||||
return mlx5e_eswitch_rep(out_dev) &&
|
||||
same_hw_devs(priv, netdev_priv(out_dev));
|
||||
same_port_devs(priv, netdev_priv(out_dev));
|
||||
}
|
||||
|
||||
static bool is_duplicated_output_device(struct net_device *dev,
|
||||
|
|
|
@ -537,10 +537,9 @@ bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget)
|
|||
void mlx5e_free_txqsq_descs(struct mlx5e_txqsq *sq)
|
||||
{
|
||||
struct mlx5e_tx_wqe_info *wi;
|
||||
u32 dma_fifo_cc, nbytes = 0;
|
||||
u16 ci, sqcc, npkts = 0;
|
||||
struct sk_buff *skb;
|
||||
u32 dma_fifo_cc;
|
||||
u16 sqcc;
|
||||
u16 ci;
|
||||
int i;
|
||||
|
||||
sqcc = sq->cc;
|
||||
|
@ -565,11 +564,15 @@ void mlx5e_free_txqsq_descs(struct mlx5e_txqsq *sq)
|
|||
}
|
||||
|
||||
dev_kfree_skb_any(skb);
|
||||
npkts++;
|
||||
nbytes += wi->num_bytes;
|
||||
sqcc += wi->num_wqebbs;
|
||||
}
|
||||
|
||||
sq->dma_fifo_cc = dma_fifo_cc;
|
||||
sq->cc = sqcc;
|
||||
|
||||
netdev_tx_completed_queue(sq->txq, npkts, nbytes);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MLX5_CORE_IPOIB
|
||||
|
|
|
@ -611,11 +611,13 @@ static int create_async_eqs(struct mlx5_core_dev *dev)
|
|||
.nent = MLX5_NUM_CMD_EQE,
|
||||
.mask[0] = 1ull << MLX5_EVENT_TYPE_CMD,
|
||||
};
|
||||
mlx5_cmd_allowed_opcode(dev, MLX5_CMD_OP_CREATE_EQ);
|
||||
err = setup_async_eq(dev, &table->cmd_eq, ¶m, "cmd");
|
||||
if (err)
|
||||
goto err1;
|
||||
|
||||
mlx5_cmd_use_events(dev);
|
||||
mlx5_cmd_allowed_opcode(dev, CMD_ALLOWED_OPCODE_ALL);
|
||||
|
||||
param = (struct mlx5_eq_param) {
|
||||
.irq_index = 0,
|
||||
|
@ -645,6 +647,7 @@ static int create_async_eqs(struct mlx5_core_dev *dev)
|
|||
mlx5_cmd_use_polling(dev);
|
||||
cleanup_async_eq(dev, &table->cmd_eq, "cmd");
|
||||
err1:
|
||||
mlx5_cmd_allowed_opcode(dev, CMD_ALLOWED_OPCODE_ALL);
|
||||
mlx5_eq_notifier_unregister(dev, &table->cq_err_nb);
|
||||
return err;
|
||||
}
|
||||
|
|
|
@ -346,8 +346,10 @@ int mlx5_events_init(struct mlx5_core_dev *dev)
|
|||
events->dev = dev;
|
||||
dev->priv.events = events;
|
||||
events->wq = create_singlethread_workqueue("mlx5_events");
|
||||
if (!events->wq)
|
||||
if (!events->wq) {
|
||||
kfree(events);
|
||||
return -ENOMEM;
|
||||
}
|
||||
INIT_WORK(&events->pcie_core_work, mlx5_pcie_event);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -344,17 +344,12 @@ static void tree_put_node(struct fs_node *node, bool locked)
|
|||
if (node->del_hw_func)
|
||||
node->del_hw_func(node);
|
||||
if (parent_node) {
|
||||
/* Only root namespace doesn't have parent and we just
|
||||
* need to free its node.
|
||||
*/
|
||||
down_write_ref_node(parent_node, locked);
|
||||
list_del_init(&node->list);
|
||||
if (node->del_sw_func)
|
||||
node->del_sw_func(node);
|
||||
up_write_ref_node(parent_node, locked);
|
||||
} else {
|
||||
kfree(node);
|
||||
}
|
||||
node->del_sw_func(node);
|
||||
if (parent_node)
|
||||
up_write_ref_node(parent_node, locked);
|
||||
node = NULL;
|
||||
}
|
||||
if (!node && parent_node)
|
||||
|
@ -468,8 +463,10 @@ static void del_sw_flow_table(struct fs_node *node)
|
|||
fs_get_obj(ft, node);
|
||||
|
||||
rhltable_destroy(&ft->fgs_hash);
|
||||
fs_get_obj(prio, ft->node.parent);
|
||||
prio->num_ft--;
|
||||
if (ft->node.parent) {
|
||||
fs_get_obj(prio, ft->node.parent);
|
||||
prio->num_ft--;
|
||||
}
|
||||
kfree(ft);
|
||||
}
|
||||
|
||||
|
@ -2351,6 +2348,17 @@ static int init_root_tree(struct mlx5_flow_steering *steering,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void del_sw_root_ns(struct fs_node *node)
|
||||
{
|
||||
struct mlx5_flow_root_namespace *root_ns;
|
||||
struct mlx5_flow_namespace *ns;
|
||||
|
||||
fs_get_obj(ns, node);
|
||||
root_ns = container_of(ns, struct mlx5_flow_root_namespace, ns);
|
||||
mutex_destroy(&root_ns->chain_lock);
|
||||
kfree(node);
|
||||
}
|
||||
|
||||
static struct mlx5_flow_root_namespace
|
||||
*create_root_ns(struct mlx5_flow_steering *steering,
|
||||
enum fs_flow_table_type table_type)
|
||||
|
@ -2377,7 +2385,7 @@ static struct mlx5_flow_root_namespace
|
|||
ns = &root_ns->ns;
|
||||
fs_init_namespace(ns);
|
||||
mutex_init(&root_ns->chain_lock);
|
||||
tree_init_node(&ns->node, NULL, NULL);
|
||||
tree_init_node(&ns->node, NULL, del_sw_root_ns);
|
||||
tree_add_node(&ns->node, NULL);
|
||||
|
||||
return root_ns;
|
||||
|
|
|
@ -396,7 +396,7 @@ static int mlx5i_init_rx(struct mlx5e_priv *priv)
|
|||
err_destroy_direct_tirs:
|
||||
mlx5e_destroy_direct_tirs(priv, priv->direct_tir);
|
||||
err_destroy_indirect_tirs:
|
||||
mlx5e_destroy_indirect_tirs(priv, true);
|
||||
mlx5e_destroy_indirect_tirs(priv);
|
||||
err_destroy_direct_rqts:
|
||||
mlx5e_destroy_direct_rqts(priv, priv->direct_tir);
|
||||
err_destroy_indirect_rqts:
|
||||
|
@ -412,7 +412,7 @@ static void mlx5i_cleanup_rx(struct mlx5e_priv *priv)
|
|||
{
|
||||
mlx5i_destroy_flow_steering(priv);
|
||||
mlx5e_destroy_direct_tirs(priv, priv->direct_tir);
|
||||
mlx5e_destroy_indirect_tirs(priv, true);
|
||||
mlx5e_destroy_indirect_tirs(priv);
|
||||
mlx5e_destroy_direct_rqts(priv, priv->direct_tir);
|
||||
mlx5e_destroy_rqt(priv, &priv->indir_rqt);
|
||||
mlx5e_close_drop_rq(&priv->drop_rq);
|
||||
|
|
|
@ -965,6 +965,8 @@ static int mlx5_function_setup(struct mlx5_core_dev *dev, bool boot)
|
|||
goto err_cmd_cleanup;
|
||||
}
|
||||
|
||||
mlx5_cmd_set_state(dev, MLX5_CMDIF_STATE_UP);
|
||||
|
||||
err = mlx5_core_enable_hca(dev, 0);
|
||||
if (err) {
|
||||
mlx5_core_err(dev, "enable hca failed\n");
|
||||
|
@ -1026,6 +1028,7 @@ static int mlx5_function_setup(struct mlx5_core_dev *dev, bool boot)
|
|||
err_disable_hca:
|
||||
mlx5_core_disable_hca(dev, 0);
|
||||
err_cmd_cleanup:
|
||||
mlx5_cmd_set_state(dev, MLX5_CMDIF_STATE_DOWN);
|
||||
mlx5_cmd_cleanup(dev);
|
||||
|
||||
return err;
|
||||
|
@ -1043,6 +1046,7 @@ static int mlx5_function_teardown(struct mlx5_core_dev *dev, bool boot)
|
|||
}
|
||||
mlx5_reclaim_startup_pages(dev);
|
||||
mlx5_core_disable_hca(dev, 0);
|
||||
mlx5_cmd_set_state(dev, MLX5_CMDIF_STATE_DOWN);
|
||||
mlx5_cmd_cleanup(dev);
|
||||
|
||||
return 0;
|
||||
|
@ -1191,7 +1195,7 @@ int mlx5_load_one(struct mlx5_core_dev *dev, bool boot)
|
|||
|
||||
err = mlx5_function_setup(dev, boot);
|
||||
if (err)
|
||||
goto out;
|
||||
goto err_function;
|
||||
|
||||
if (boot) {
|
||||
err = mlx5_init_once(dev);
|
||||
|
@ -1229,6 +1233,7 @@ int mlx5_load_one(struct mlx5_core_dev *dev, bool boot)
|
|||
mlx5_cleanup_once(dev);
|
||||
function_teardown:
|
||||
mlx5_function_teardown(dev, boot);
|
||||
err_function:
|
||||
dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR;
|
||||
mutex_unlock(&dev->intf_state_mutex);
|
||||
|
||||
|
|
|
@ -213,6 +213,12 @@ enum mlx5_port_status {
|
|||
MLX5_PORT_DOWN = 2,
|
||||
};
|
||||
|
||||
enum mlx5_cmdif_state {
|
||||
MLX5_CMDIF_STATE_UNINITIALIZED,
|
||||
MLX5_CMDIF_STATE_UP,
|
||||
MLX5_CMDIF_STATE_DOWN,
|
||||
};
|
||||
|
||||
struct mlx5_cmd_first {
|
||||
__be32 data[4];
|
||||
};
|
||||
|
@ -258,6 +264,7 @@ struct mlx5_cmd_stats {
|
|||
struct mlx5_cmd {
|
||||
struct mlx5_nb nb;
|
||||
|
||||
enum mlx5_cmdif_state state;
|
||||
void *cmd_alloc_buf;
|
||||
dma_addr_t alloc_dma;
|
||||
int alloc_size;
|
||||
|
@ -284,6 +291,7 @@ struct mlx5_cmd {
|
|||
struct semaphore sem;
|
||||
struct semaphore pages_sem;
|
||||
int mode;
|
||||
u16 allowed_opcode;
|
||||
struct mlx5_cmd_work_ent *ent_arr[MLX5_MAX_COMMANDS];
|
||||
struct dma_pool *pool;
|
||||
struct mlx5_cmd_debug dbg;
|
||||
|
@ -743,6 +751,7 @@ struct mlx5_cmd_work_ent {
|
|||
struct delayed_work cb_timeout_work;
|
||||
void *context;
|
||||
int idx;
|
||||
struct completion handling;
|
||||
struct completion done;
|
||||
struct mlx5_cmd *cmd;
|
||||
struct work_struct work;
|
||||
|
@ -874,10 +883,17 @@ mlx5_frag_buf_get_idx_last_contig_stride(struct mlx5_frag_buf_ctrl *fbc, u32 ix)
|
|||
return min_t(u32, last_frag_stride_idx - fbc->strides_offset, fbc->sz_m1);
|
||||
}
|
||||
|
||||
enum {
|
||||
CMD_ALLOWED_OPCODE_ALL,
|
||||
};
|
||||
|
||||
int mlx5_cmd_init(struct mlx5_core_dev *dev);
|
||||
void mlx5_cmd_cleanup(struct mlx5_core_dev *dev);
|
||||
void mlx5_cmd_set_state(struct mlx5_core_dev *dev,
|
||||
enum mlx5_cmdif_state cmdif_state);
|
||||
void mlx5_cmd_use_events(struct mlx5_core_dev *dev);
|
||||
void mlx5_cmd_use_polling(struct mlx5_core_dev *dev);
|
||||
void mlx5_cmd_allowed_opcode(struct mlx5_core_dev *dev, u16 opcode);
|
||||
|
||||
struct mlx5_async_ctx {
|
||||
struct mlx5_core_dev *dev;
|
||||
|
|
Loading…
Reference in New Issue