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drm/radeon/dpm: fix UVD clock setting on SI 

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2013-05-14 18:24:34 -04:00
parent d434e81e59
commit e34568b892
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/radeon/si_dpm.c
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@ -5883,7 +5883,7 @@ int si_dpm_set_power_state(struct radeon_device *rdev)
}
if (eg_pi->pcie_performance_request)
si_request_link_speed_change_before_state_change(rdev, new_ps, old_ps);
rv770_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
ni_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
ret = si_enable_power_containment(rdev, new_ps, false);
if (ret) {
DRM_ERROR("si_enable_power_containment failed\n");
@ -5948,7 +5948,7 @@ int si_dpm_set_power_state(struct radeon_device *rdev)
DRM_ERROR("si_set_sw_state failed\n");
return ret;
}
rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
ni_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
if (eg_pi->pcie_performance_request)
si_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps);
ret = si_set_power_state_conditionally_enable_ulv(rdev, new_ps);