mirror of https://gitee.com/openkylin/linux.git
OMAP: DSS2: DSI: Wait for DSI PLL clocks to be active before selecting them
The TRM tells us to wait for the DSI PLL derived clocks to become active before selecting them for use. I didn't actually have any issues which this would fix but according to the TRM it seems to be the right thing to do. Signed-off-by: Ville Syrjälä <ville.syrjala@nokia.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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@ -3195,6 +3195,18 @@ int dsi_init_display(struct omap_dss_device *dssdev)
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return 0;
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}
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void dsi_wait_dsi1_pll_active(void)
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{
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if (wait_for_bit_change(DSI_PLL_STATUS, 7, 1) != 1)
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DSSERR("DSI1 PLL clock not active\n");
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}
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void dsi_wait_dsi2_pll_active(void)
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{
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if (wait_for_bit_change(DSI_PLL_STATUS, 8, 1) != 1)
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DSSERR("DSI2 PLL clock not active\n");
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}
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int dsi_init(struct platform_device *pdev)
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{
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u32 rev;
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@ -265,6 +265,9 @@ void dss_select_dispc_clk_source(enum dss_clk_source clk_src)
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b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1;
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if (clk_src == DSS_SRC_DSI1_PLL_FCLK)
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dsi_wait_dsi1_pll_active();
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REG_FLD_MOD(DSS_CONTROL, b, 0, 0); /* DISPC_CLK_SWITCH */
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dss.dispc_clk_source = clk_src;
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@ -279,6 +282,9 @@ void dss_select_dsi_clk_source(enum dss_clk_source clk_src)
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b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1;
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if (clk_src == DSS_SRC_DSI2_PLL_FCLK)
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dsi_wait_dsi2_pll_active();
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REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */
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dss.dsi_clk_source = clk_src;
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@ -281,6 +281,8 @@ void dsi_pll_uninit(void);
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void dsi_get_overlay_fifo_thresholds(enum omap_plane plane,
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u32 fifo_size, enum omap_burst_size *burst_size,
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u32 *fifo_low, u32 *fifo_high);
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void dsi_wait_dsi1_pll_active(void);
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void dsi_wait_dsi2_pll_active(void);
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#else
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static inline int dsi_init(struct platform_device *pdev)
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{
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@ -289,6 +291,12 @@ static inline int dsi_init(struct platform_device *pdev)
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static inline void dsi_exit(void)
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{
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}
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static inline void dsi_wait_dsi1_pll_active(void)
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{
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}
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static inline void dsi_wait_dsi2_pll_active(void)
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{
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}
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#endif
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/* DPI */
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