mirror of https://gitee.com/openkylin/linux.git
MIPS: KVM: Make entry code MIPS64 friendly
The MIPS KVM entry code (originally kvm_locore.S, later locore.S, and
now entry.c) has never quite been right when built for 64-bit, using
32-bit instructions when 64-bit instructions were needed for handling
64-bit registers and pointers. Fix several cases of this now.
The changes roughly fall into the following categories.
- COP0 scratch registers contain guest register values and the VCPU
pointer, and are themselves full width. Similarly CP0_EPC and
CP0_BadVAddr registers are full width (even though technically we
don't support 64-bit guest address spaces with trap & emulate KVM).
Use MFC0/MTC0 for accessing them.
- Handling of stack pointers and the VCPU pointer must match the pointer
size of the kernel ABI (always o32 or n64), so use ADDIU.
- The CPU number in thread_info, and the guest_{user,kernel}_asid arrays
in kvm_vcpu_arch are all 32 bit integers, so use lw (instead of LW) to
load them.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
James Hogan
Paolo Bonzini
parent
28cc5bd568
commit
e41637d858
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@ -120,12 +120,12 @@ static void kvm_mips_build_save_scratch(u32 **p, unsigned int tmp,
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unsigned int frame)
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{
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/* Save the VCPU scratch register value in cp0_epc of the stack frame */
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uasm_i_mfc0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]);
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UASM_i_MFC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]);
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UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame);
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/* Save the temp scratch register value in cp0_cause of stack frame */
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if (scratch_tmp[0] == 31) {
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uasm_i_mfc0(p, tmp, scratch_tmp[0], scratch_tmp[1]);
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UASM_i_MFC0(p, tmp, scratch_tmp[0], scratch_tmp[1]);
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UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame);
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}
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}
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@ -138,11 +138,11 @@ static void kvm_mips_build_restore_scratch(u32 **p, unsigned int tmp,
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* kvm_mips_build_save_scratch().
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*/
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UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame);
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uasm_i_mtc0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]);
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UASM_i_MTC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]);
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if (scratch_tmp[0] == 31) {
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UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame);
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uasm_i_mtc0(p, tmp, scratch_tmp[0], scratch_tmp[1]);
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UASM_i_MTC0(p, tmp, scratch_tmp[0], scratch_tmp[1]);
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}
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}
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@ -171,7 +171,7 @@ void *kvm_mips_build_vcpu_run(void *addr)
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*/
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/* k0/k1 not being used in host kernel context */
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uasm_i_addiu(&p, K1, SP, -(int)sizeof(struct pt_regs));
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UASM_i_ADDIU(&p, K1, SP, -(int)sizeof(struct pt_regs));
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for (i = 16; i < 32; ++i) {
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if (i == 24)
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i = 28;
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@ -186,10 +186,10 @@ void *kvm_mips_build_vcpu_run(void *addr)
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kvm_mips_build_save_scratch(&p, V1, K1);
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/* VCPU scratch register has pointer to vcpu */
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uasm_i_mtc0(&p, A1, scratch_vcpu[0], scratch_vcpu[1]);
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UASM_i_MTC0(&p, A1, scratch_vcpu[0], scratch_vcpu[1]);
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/* Offset into vcpu->arch */
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uasm_i_addiu(&p, K1, A1, offsetof(struct kvm_vcpu, arch));
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UASM_i_ADDIU(&p, K1, A1, offsetof(struct kvm_vcpu, arch));
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/*
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* Save the host stack to VCPU, used for exception processing
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@ -252,7 +252,7 @@ static void *kvm_mips_build_enter_guest(void *addr)
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/* Set Guest EPC */
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UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, pc), K1);
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uasm_i_mtc0(&p, T0, C0_EPC);
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UASM_i_MTC0(&p, T0, C0_EPC);
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/* Set the ASID for the Guest Kernel */
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UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, cop0), K1);
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@ -261,20 +261,20 @@ static void *kvm_mips_build_enter_guest(void *addr)
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uasm_i_andi(&p, T0, T0, KSU_USER | ST0_ERL | ST0_EXL);
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uasm_i_xori(&p, T0, T0, KSU_USER);
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uasm_il_bnez(&p, &r, T0, label_kernel_asid);
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uasm_i_addiu(&p, T1, K1,
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UASM_i_ADDIU(&p, T1, K1,
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offsetof(struct kvm_vcpu_arch, guest_kernel_asid));
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/* else user */
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uasm_i_addiu(&p, T1, K1,
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UASM_i_ADDIU(&p, T1, K1,
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offsetof(struct kvm_vcpu_arch, guest_user_asid));
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uasm_l_kernel_asid(&l, p);
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/* t1: contains the base of the ASID array, need to get the cpu id */
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/* smp_processor_id */
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UASM_i_LW(&p, T2, offsetof(struct thread_info, cpu), GP);
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uasm_i_lw(&p, T2, offsetof(struct thread_info, cpu), GP);
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/* x4 */
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uasm_i_sll(&p, T2, T2, 2);
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UASM_i_ADDU(&p, T3, T1, T2);
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UASM_i_LW(&p, K0, 0, T3);
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uasm_i_lw(&p, K0, 0, T3);
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#ifdef CONFIG_MIPS_ASID_BITS_VARIABLE
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/* x sizeof(struct cpuinfo_mips)/4 */
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uasm_i_addiu(&p, T3, ZERO, sizeof(struct cpuinfo_mips)/4);
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@ -344,11 +344,11 @@ void *kvm_mips_build_exception(void *addr, void *handler)
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memset(relocs, 0, sizeof(relocs));
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/* Save guest k1 into scratch register */
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uasm_i_mtc0(&p, K1, scratch_tmp[0], scratch_tmp[1]);
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UASM_i_MTC0(&p, K1, scratch_tmp[0], scratch_tmp[1]);
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/* Get the VCPU pointer from the VCPU scratch register */
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uasm_i_mfc0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]);
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uasm_i_addiu(&p, K1, K1, offsetof(struct kvm_vcpu, arch));
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UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]);
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UASM_i_ADDIU(&p, K1, K1, offsetof(struct kvm_vcpu, arch));
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/* Save guest k0 into VCPU structure */
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UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1);
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@ -415,13 +415,13 @@ void *kvm_mips_build_exit(void *addr)
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/* Finally save guest k1 to VCPU */
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uasm_i_ehb(&p);
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uasm_i_mfc0(&p, T0, scratch_tmp[0], scratch_tmp[1]);
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UASM_i_MFC0(&p, T0, scratch_tmp[0], scratch_tmp[1]);
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UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, gprs[K1]), K1);
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/* Now that context has been saved, we can use other registers */
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/* Restore vcpu */
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uasm_i_mfc0(&p, A1, scratch_vcpu[0], scratch_vcpu[1]);
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UASM_i_MFC0(&p, A1, scratch_vcpu[0], scratch_vcpu[1]);
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uasm_i_move(&p, S1, A1);
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/* Restore run (vcpu->run) */
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@ -433,10 +433,10 @@ void *kvm_mips_build_exit(void *addr)
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* Save Host level EPC, BadVaddr and Cause to VCPU, useful to process
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* the exception
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*/
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uasm_i_mfc0(&p, K0, C0_EPC);
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UASM_i_MFC0(&p, K0, C0_EPC);
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UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, pc), K1);
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uasm_i_mfc0(&p, K0, C0_BADVADDR);
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UASM_i_MFC0(&p, K0, C0_BADVADDR);
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UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_badvaddr),
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K1);
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@ -506,7 +506,7 @@ void *kvm_mips_build_exit(void *addr)
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UASM_i_LW(&p, SP, offsetof(struct kvm_vcpu_arch, host_stack), K1);
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/* Saved host state */
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uasm_i_addiu(&p, SP, SP, -(int)sizeof(struct pt_regs));
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UASM_i_ADDIU(&p, SP, SP, -(int)sizeof(struct pt_regs));
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/*
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* XXXKYMA do we need to load the host ASID, maybe not because the
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@ -529,7 +529,7 @@ void *kvm_mips_build_exit(void *addr)
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*/
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UASM_i_LA(&p, T9, (unsigned long)kvm_mips_handle_exit);
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uasm_i_jalr(&p, RA, T9);
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uasm_i_addiu(&p, SP, SP, -CALLFRAME_SIZ);
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UASM_i_ADDIU(&p, SP, SP, -CALLFRAME_SIZ);
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uasm_resolve_relocs(relocs, labels);
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@ -569,7 +569,7 @@ static void *kvm_mips_build_ret_from_exit(void *addr)
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*/
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uasm_i_move(&p, K1, S1);
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uasm_i_addiu(&p, K1, K1, offsetof(struct kvm_vcpu, arch));
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UASM_i_ADDIU(&p, K1, K1, offsetof(struct kvm_vcpu, arch));
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/*
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* Check return value, should tell us if we are returning to the
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@ -603,7 +603,7 @@ static void *kvm_mips_build_ret_to_guest(void *addr)
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u32 *p = addr;
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/* Put the saved pointer to vcpu (s1) back into the scratch register */
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uasm_i_mtc0(&p, S1, scratch_vcpu[0], scratch_vcpu[1]);
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UASM_i_MTC0(&p, S1, scratch_vcpu[0], scratch_vcpu[1]);
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/* Load up the Guest EBASE to minimize the window where BEV is set */
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UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1);
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@ -645,7 +645,7 @@ static void *kvm_mips_build_ret_to_host(void *addr)
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/* EBASE is already pointing to Linux */
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UASM_i_LW(&p, K1, offsetof(struct kvm_vcpu_arch, host_stack), K1);
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uasm_i_addiu(&p, K1, K1, -(int)sizeof(struct pt_regs));
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UASM_i_ADDIU(&p, K1, K1, -(int)sizeof(struct pt_regs));
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/*
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* r2/v0 is the return code, shift it down by 2 (arithmetic)
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