mirror of https://gitee.com/openkylin/linux.git
[ARM] 3360/1: S3C2440 - add set rate methods and camera clock
Patch from Ben Dooks Add set_rate methods for the extra clocks on the S3C2440 and add the camera UPLL clock source Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -45,6 +45,48 @@
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/* S3C2440 extended clock support */
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/* S3C2440 extended clock support */
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static unsigned long s3c2440_camif_upll_round(struct clk *clk,
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unsigned long rate)
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{
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unsigned long parent_rate = clk_get_rate(clk->parent);
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int div;
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if (rate > parent_rate)
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return parent_rate;
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/* note, we remove the +/- 1 calculations for the divisor */
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div = (parent_rate / rate) / 2;
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if (div < 1)
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div = 1;
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else if (div > 16)
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div = 16;
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return parent_rate / (div * 2);
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}
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static int s3c2440_camif_upll_setrate(struct clk *clk, unsigned long rate)
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{
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unsigned long parent_rate = clk_get_rate(clk->parent);
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unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
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rate = s3c2440_camif_upll_round(clk, rate);
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camdivn &= ~(S3C2440_CAMDIVN_CAMCLK_SEL | S3C2440_CAMDIVN_CAMCLK_MASK);
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if (rate != parent_rate) {
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camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
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camdivn |= (((parent_rate / rate) / 2) - 1);
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}
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__raw_writel(camdivn, S3C2440_CAMDIVN);
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return 0;
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}
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/* Extra S3C2440 clocks */
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static struct clk s3c2440_clk_cam = {
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static struct clk s3c2440_clk_cam = {
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.name = "camif",
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.name = "camif",
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.id = -1,
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.id = -1,
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@ -52,6 +94,13 @@ static struct clk s3c2440_clk_cam = {
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.ctrlbit = S3C2440_CLKCON_CAMERA,
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.ctrlbit = S3C2440_CLKCON_CAMERA,
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};
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};
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static struct clk s3c2440_clk_cam_upll = {
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.name = "camif-upll",
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.id = -1,
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.set_rate = s3c2440_camif_upll_setrate,
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.round_rate = s3c2440_camif_upll_round,
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};
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static struct clk s3c2440_clk_ac97 = {
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static struct clk s3c2440_clk_ac97 = {
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.name = "ac97",
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.name = "ac97",
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.id = -1,
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.id = -1,
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@ -78,9 +127,11 @@ static int s3c2440_clk_add(struct sys_device *sysdev)
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s3c2440_clk_cam.parent = clk_h;
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s3c2440_clk_cam.parent = clk_h;
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s3c2440_clk_ac97.parent = clk_p;
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s3c2440_clk_ac97.parent = clk_p;
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s3c2440_clk_cam_upll.parent = clk_upll;
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s3c24xx_register_clock(&s3c2440_clk_ac97);
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s3c24xx_register_clock(&s3c2440_clk_ac97);
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s3c24xx_register_clock(&s3c2440_clk_cam);
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s3c24xx_register_clock(&s3c2440_clk_cam);
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s3c24xx_register_clock(&s3c2440_clk_cam_upll);
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clk_disable(&s3c2440_clk_ac97);
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clk_disable(&s3c2440_clk_ac97);
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clk_disable(&s3c2440_clk_cam);
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clk_disable(&s3c2440_clk_cam);
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