mirror of https://gitee.com/openkylin/linux.git
ARM: SoC fixes for 3.14-rc1
Here's a set of patches for (hopefully) -rc1. Some of them are fixes, but a good number of them also do things such as enable new drivers in the defconfigs for platforms that have such devices, increases coverage of the multiplatform defconfig and some DTS changes that plumbs up some of the devices that now have bindings and driver support. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJS7VYsAAoJEIwa5zzehBx3FKIQAIVIkjlKAtvRpg+P/BYWigXq 6jG2xuBhwf1Yciu70ttvfRnR9bGJc+0o5w/qjr7ARSFp7GkDlWXtIwj+1EwGSEES hB/f2GcBfNLJOI0rHvvudz+7HlpiyfB6iMj3U25hnpShrSTxbOHDC6pU6pYjUzBy T1AYTmfa0vwuy9TNodOr4dVYlbJc3YA0V2sBTusXDFwm03XTdCd7E7RJIr/MRDEN 96PtaNrfstmxeTjN0NBuL2IdsZNR2mn/cgWTL1lVqVE8+z7QyvmPDqmWD5iCVQaM +6mJbXL4jzM1CyB8Qf89sNtTaFVjwbgvbtuljPv/7q/jhf2rvixaMzywCv28FjB+ uJCaLh1r/HiR61tlw0yX3ixPdKFJqyWV9vF5+uuwmEQCCPpFWGzTcNaZ7NRiYzEt yqt1ZRDhEAli8iHt96LxMwLIklaDGvuxLtHsv4a5djEoaO/yqRTNZXDjwIsIzkpD N8vUwPf7Pnw+3/5iGVTQdZaPzmrNjqTOLwz0s7ys2avVsRsNNi68hMuIj+qrNlzu /tJhhh0u9SONRM3c6D9mtrZPD7Gs8QgMbT9TyZ2/ILQKuo4wO9F1GDN93MjZI5oq 1rX/QUeYItWQamzHGmI8ZlAx4YlsxxB90eJ8CaG2F8sVtumklrFRb43Vf9NRsyo/ XDrjoS/cdi7PAO0wemkg =ymAC -----END PGP SIGNATURE----- Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Here's a set of patches for (hopefully) -rc1. Some of them are fixes, but a good number of them also do things such as enable new drivers in the defconfigs for platforms that have such devices, increases coverage of the multiplatform defconfig and some DTS changes that plumbs up some of the devices that now have bindings and driver support. The commit dates are recent; we've mostly collected these fixes in the last few days but I also had to rebuild the branch yesterday to sort out some internal conflicts which reset the timestamps. The changes should have been tested by each platform maintainer already (and few of them have cross-platform impact) so I'm personally not too concerned by it at this time" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits) ARM: multi_v7_defconfig: remove redundant entries and re-enable TI_EDMA ARM: multi_v7_defconfig: add mvebu drivers clocksource: kona: Add basic use of external clock drivers: bus: fix CCI driver kcalloc call parameters swap ARM: dts: bcm28155-ap: Fix Card Detection GPIO ARM: multi_v7_defconfig: Select CONFIG_AT803X_PHY ARM: keystone: config: fix build warning when CONFIG_DMADEVICES is not set MAINTAINERS: ARM: SiRF: use regex patterns to involve all SiRF drivers ARM: dts: zynq: Add SDHCI nodes ARM: hisi: don't select SMP ARM: tegra: rebuild tegra_defconfig to add DEBUG_FS ARM: multi_v7: copy most options from tegra_defconfig ARM: iop32x: fix power off handling for the EM7210 board ARM: integrator: restore static map on the CP ARM: msm_defconfig: Enable MSM clock drivers ARM: dts: msm: Add clock controller nodes and hook into uart ARM: OMAP4+: move errata initialization to omap4_pm_init_early ARM: OMAP4460: cpuidle: Extend PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD on cpuidle ARM: mvebu: fix compilation warning on Armada 370 (i.e. non-SMP) ARM: shmobile: r8a7790.dtsi: ficx i2c[0-3] clock reference ...
This commit is contained in:
Linus Torvalds
commit
e4c0da2165
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@ -868,14 +868,7 @@ F: arch/arm/mach-prima2/
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F: drivers/clk/clk-prima2.c
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F: drivers/clocksource/timer-prima2.c
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F: drivers/clocksource/timer-marco.c
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F: drivers/dma/sirf-dma.c
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F: drivers/i2c/busses/i2c-sirf.c
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F: drivers/input/misc/sirfsoc-onkey.c
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F: drivers/irqchip/irq-sirfsoc.c
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F: drivers/mmc/host/sdhci-sirf.c
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F: drivers/pinctrl/sirf/
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F: drivers/rtc/rtc-sirfsoc.c
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F: drivers/spi/spi-sirf.c
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N: [^a-z]sirf
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ARM/EBSA110 MACHINE SUPPORT
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M: Russell King <linux@arm.linux.org.uk>
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@ -13,6 +13,8 @@
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "bcm11351.dtsi"
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/ {
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@ -60,7 +62,7 @@ sdio2: sdio@3f190000 {
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sdio4: sdio@3f1b0000 {
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max-frequency = <48000000>;
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cd-gpios = <&gpio 14 0>;
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cd-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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@ -2,6 +2,8 @@
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/include/ "skeleton.dtsi"
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#include <dt-bindings/clock/qcom,gcc-msm8660.h>
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/ {
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model = "Qualcomm MSM8660 SURF";
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compatible = "qcom,msm8660-surf", "qcom,msm8660";
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@ -37,11 +39,20 @@ msmgpio: gpio@800000 {
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#interrupt-cells = <2>;
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};
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gcc: clock-controller@900000 {
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compatible = "qcom,gcc-msm8660";
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#clock-cells = <1>;
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#reset-cells = <1>;
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reg = <0x900000 0x4000>;
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};
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serial@19c40000 {
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compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
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reg = <0x19c40000 0x1000>,
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<0x19c00000 0x1000>;
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interrupts = <0 195 0x0>;
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clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>;
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clock-names = "core", "iface";
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};
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qcom,ssbi@500000 {
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@ -2,6 +2,8 @@
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/include/ "skeleton.dtsi"
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#include <dt-bindings/clock/qcom,gcc-msm8960.h>
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/ {
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model = "Qualcomm MSM8960 CDP";
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compatible = "qcom,msm8960-cdp", "qcom,msm8960";
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@ -37,11 +39,27 @@ msmgpio: gpio@800000 {
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reg = <0x800000 0x4000>;
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};
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gcc: clock-controller@900000 {
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compatible = "qcom,gcc-msm8960";
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#clock-cells = <1>;
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#reset-cells = <1>;
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reg = <0x900000 0x4000>;
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};
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clock-controller@4000000 {
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compatible = "qcom,mmcc-msm8960";
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reg = <0x4000000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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serial@16440000 {
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compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
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reg = <0x16440000 0x1000>,
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<0x16400000 0x1000>;
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interrupts = <0 154 0x0>;
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clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
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clock-names = "core", "iface";
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};
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qcom,ssbi@500000 {
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@ -2,6 +2,8 @@
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#include "skeleton.dtsi"
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#include <dt-bindings/clock/qcom,gcc-msm8974.h>
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/ {
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model = "Qualcomm MSM8974";
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compatible = "qcom,msm8974";
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@ -93,5 +95,27 @@ restart@fc4ab000 {
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compatible = "qcom,pshold";
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reg = <0xfc4ab000 0x4>;
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};
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gcc: clock-controller@fc400000 {
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compatible = "qcom,gcc-msm8974";
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#clock-cells = <1>;
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#reset-cells = <1>;
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reg = <0xfc400000 0x4000>;
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};
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mmcc: clock-controller@fd8c0000 {
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compatible = "qcom,mmcc-msm8974";
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#clock-cells = <1>;
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#reset-cells = <1>;
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reg = <0xfd8c0000 0x6000>;
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};
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serial@f991e000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0xf991e000 0x1000>;
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interrupts = <0 108 0x0>;
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clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
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clock-names = "core", "iface";
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};
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};
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};
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@ -197,7 +197,7 @@ i2c0: i2c@e6508000 {
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reg = <0 0xe6508000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7790_CLK_I2C0>;
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clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
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status = "disabled";
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};
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@ -208,7 +208,7 @@ i2c1: i2c@e6518000 {
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reg = <0 0xe6518000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7790_CLK_I2C1>;
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clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
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status = "disabled";
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};
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@ -219,7 +219,7 @@ i2c2: i2c@e6530000 {
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reg = <0 0xe6530000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7790_CLK_I2C2>;
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clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
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status = "disabled";
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};
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@ -230,7 +230,7 @@ i2c3: i2c@e6540000 {
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reg = <0 0xe6540000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7790_CLK_I2C3>;
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clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
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status = "disabled";
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};
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@ -102,6 +102,26 @@ gem1: ethernet@e000c000 {
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clock-names = "pclk", "hclk", "tx_clk";
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};
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sdhci0: ps7-sdhci@e0100000 {
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compatible = "arasan,sdhci-8.9a";
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status = "disabled";
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clock-names = "clk_xin", "clk_ahb";
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clocks = <&clkc 21>, <&clkc 32>;
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interrupt-parent = <&intc>;
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interrupts = <0 24 4>;
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reg = <0xe0100000 0x1000>;
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} ;
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sdhci1: ps7-sdhci@e0101000 {
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compatible = "arasan,sdhci-8.9a";
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status = "disabled";
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clock-names = "clk_xin", "clk_ahb";
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clocks = <&clkc 22>, <&clkc 33>;
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interrupt-parent = <&intc>;
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interrupts = <0 47 4>;
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reg = <0xe0101000 0x1000>;
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} ;
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slcr: slcr@f8000000 {
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compatible = "xlnx,zynq-slcr";
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reg = <0xF8000000 0x1000>;
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@ -34,6 +34,10 @@ &gem0 {
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phy-mode = "rgmii";
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};
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&sdhci0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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@ -35,6 +35,10 @@ &gem0 {
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phy-mode = "rgmii";
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};
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&sdhci0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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@ -35,6 +35,10 @@ &gem0 {
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phy-mode = "rgmii";
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};
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&sdhci0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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@ -142,6 +142,7 @@ CONFIG_USB_DWC3_DEBUG=y
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CONFIG_USB_DWC3_VERBOSE=y
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CONFIG_KEYSTONE_USB_PHY=y
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CONFIG_DMADEVICES=y
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CONFIG_TI_EDMA=y
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CONFIG_COMMON_CLK_DEBUG=y
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CONFIG_MEMORY=y
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CONFIG_EXT4_FS=y
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@ -114,6 +114,10 @@ CONFIG_USB_GADGET_VBUS_DRAW=500
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CONFIG_NEW_LEDS=y
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CONFIG_RTC_CLASS=y
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CONFIG_STAGING=y
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CONFIG_COMMON_CLK_QCOM=y
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CONFIG_MSM_GCC_8660=y
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CONFIG_MSM_MMCC_8960=y
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CONFIG_MSM_MMCC_8974=y
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CONFIG_MSM_IOMMU=y
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CONFIG_EXT2_FS=y
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CONFIG_EXT2_FS_XATTR=y
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@ -1,7 +1,12 @@
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CONFIG_SYSVIPC=y
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CONFIG_IRQ_DOMAIN_DEBUG=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_EMBEDDED=y
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CONFIG_MODULES=y
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CONFIG_MODULE_UNLOAD=y
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CONFIG_PARTITION_ADVANCED=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_MACH_ARMADA_370=y
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CONFIG_MACH_ARMADA_XP=y
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@ -38,7 +43,7 @@ CONFIG_ARCH_TEGRA=y
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CONFIG_ARCH_TEGRA_2x_SOC=y
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CONFIG_ARCH_TEGRA_3x_SOC=y
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CONFIG_ARCH_TEGRA_114_SOC=y
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CONFIG_TEGRA_PCI=y
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CONFIG_ARCH_TEGRA_124_SOC=y
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CONFIG_TEGRA_EMC_SCALING_ENABLE=y
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CONFIG_ARCH_U8500=y
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CONFIG_MACH_HREFV60=y
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|
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@ -49,19 +54,55 @@ CONFIG_ARCH_VEXPRESS_CA9X4=y
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CONFIG_ARCH_VIRT=y
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CONFIG_ARCH_WM8850=y
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CONFIG_ARCH_ZYNQ=y
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CONFIG_TRUSTED_FOUNDATIONS=y
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CONFIG_PCI=y
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CONFIG_PCI_MSI=y
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CONFIG_PCI_MVEBU=y
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CONFIG_PCI_TEGRA=y
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CONFIG_SMP=y
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CONFIG_HIGHPTE=y
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CONFIG_CMA=y
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CONFIG_ARM_APPENDED_DTB=y
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CONFIG_ARM_ATAG_DTB_COMPAT=y
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CONFIG_KEXEC=y
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CONFIG_CPU_FREQ=y
|
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CONFIG_CPU_FREQ_STAT_DETAILS=y
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CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
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CONFIG_CPU_IDLE=y
|
||||
CONFIG_NET=y
|
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CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
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CONFIG_INET=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
CONFIG_IP_PNP_RARP=y
|
||||
CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_IPV6_OPTIMISTIC_DAD=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_IPCOMP=m
|
||||
CONFIG_IPV6_MIP6=m
|
||||
CONFIG_IPV6_TUNNEL=m
|
||||
CONFIG_IPV6_MULTIPLE_TABLES=y
|
||||
CONFIG_CFG80211=m
|
||||
CONFIG_MAC80211=m
|
||||
CONFIG_RFKILL=y
|
||||
CONFIG_RFKILL_INPUT=y
|
||||
CONFIG_RFKILL_GPIO=y
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_OMAP_OCP2SCP=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_M25P80=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_ICS932S401=y
|
||||
CONFIG_APDS9802ALS=y
|
||||
CONFIG_ISL29003=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_DEV_SR=y
|
||||
CONFIG_SCSI_MULTI_LUN=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_SATA_AHCI_PLATFORM=y
|
||||
CONFIG_SATA_HIGHBANK=y
|
||||
|
|
@ -69,13 +110,30 @@ CONFIG_SATA_MV=y
|
|||
CONFIG_NETDEVICES=y
|
||||
CONFIG_SUN4I_EMAC=y
|
||||
CONFIG_NET_CALXEDA_XGMAC=y
|
||||
CONFIG_MVNETA=y
|
||||
CONFIG_KS8851=y
|
||||
CONFIG_R8169=y
|
||||
CONFIG_SMSC911X=y
|
||||
CONFIG_STMMAC_ETH=y
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_MDIO_SUN4I=y
|
||||
CONFIG_TI_CPSW=y
|
||||
CONFIG_AT803X_PHY=y
|
||||
CONFIG_MARVELL_PHY=y
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_USB_PEGASUS=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_USB_NET_SMSC75XX=y
|
||||
CONFIG_USB_NET_SMSC95XX=y
|
||||
CONFIG_BRCMFMAC=m
|
||||
CONFIG_RT2X00=m
|
||||
CONFIG_RT2800USB=m
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
CONFIG_KEYBOARD_TEGRA=y
|
||||
CONFIG_KEYBOARD_SPEAR=y
|
||||
CONFIG_KEYBOARD_CROS_EC=y
|
||||
CONFIG_MOUSE_PS2_ELANTECH=y
|
||||
CONFIG_INPUT_MISC=y
|
||||
CONFIG_INPUT_MPU3050=y
|
||||
CONFIG_SERIO_AMBAKMI=y
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
|
|
@ -98,30 +156,81 @@ CONFIG_SERIAL_FSL_LPUART=y
|
|||
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
|
||||
CONFIG_SERIAL_ST_ASC=y
|
||||
CONFIG_SERIAL_ST_ASC_CONSOLE=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MUX=y
|
||||
CONFIG_I2C_MUX_PINCTRL=y
|
||||
CONFIG_I2C_DESIGNWARE_PLATFORM=y
|
||||
CONFIG_I2C_MV64XXX=y
|
||||
CONFIG_I2C_SIRF=y
|
||||
CONFIG_I2C_TEGRA=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_OMAP24XX=y
|
||||
CONFIG_SPI_ORION=y
|
||||
CONFIG_SPI_PL022=y
|
||||
CONFIG_SPI_SIRF=y
|
||||
CONFIG_SPI_TEGRA114=y
|
||||
CONFIG_SPI_TEGRA20_SFLASH=y
|
||||
CONFIG_SPI_TEGRA20_SLINK=y
|
||||
CONFIG_PINCTRL_SINGLE=y
|
||||
CONFIG_PINCTRL_AS3722=y
|
||||
CONFIG_PINCTRL_PALMAS=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_GENERIC_PLATFORM=y
|
||||
CONFIG_GPIO_PCA953X_IRQ=y
|
||||
CONFIG_GPIO_TWL4030=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_GPIO_PALMAS=y
|
||||
CONFIG_GPIO_TPS6586X=y
|
||||
CONFIG_GPIO_TPS65910=y
|
||||
CONFIG_BATTERY_SBS=y
|
||||
CONFIG_CHARGER_TPS65090=y
|
||||
CONFIG_POWER_RESET_AS3722=y
|
||||
CONFIG_POWER_RESET_GPIO=y
|
||||
CONFIG_SENSORS_LM90=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_ARMADA_THERMAL=y
|
||||
CONFIG_MFD_AS3722=y
|
||||
CONFIG_MFD_CROS_EC=y
|
||||
CONFIG_MFD_CROS_EC_SPI=y
|
||||
CONFIG_MFD_MAX8907=y
|
||||
CONFIG_MFD_PALMAS=y
|
||||
CONFIG_MFD_TPS65090=y
|
||||
CONFIG_MFD_TPS6586X=y
|
||||
CONFIG_MFD_TPS65910=y
|
||||
CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
|
||||
CONFIG_REGULATOR_AB8500=y
|
||||
CONFIG_REGULATOR_AS3722=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_MAX8907=y
|
||||
CONFIG_REGULATOR_PALMAS=y
|
||||
CONFIG_REGULATOR_TPS51632=y
|
||||
CONFIG_REGULATOR_TPS62360=y
|
||||
CONFIG_REGULATOR_TPS65090=y
|
||||
CONFIG_REGULATOR_TPS6586X=y
|
||||
CONFIG_REGULATOR_TPS65910=y
|
||||
CONFIG_REGULATOR_TWL4030=y
|
||||
CONFIG_REGULATOR_VEXPRESS=y
|
||||
CONFIG_MEDIA_SUPPORT=y
|
||||
CONFIG_MEDIA_CAMERA_SUPPORT=y
|
||||
CONFIG_MEDIA_USB_SUPPORT=y
|
||||
CONFIG_DRM=y
|
||||
CONFIG_TEGRA_HOST1X=y
|
||||
CONFIG_DRM_TEGRA=y
|
||||
CONFIG_DRM_PANEL_SIMPLE=y
|
||||
CONFIG_FB_ARMCLCD=y
|
||||
CONFIG_FB_WM8505=y
|
||||
CONFIG_FB_SIMPLE=y
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
CONFIG_BACKLIGHT_PWM=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_SOC_TEGRA=y
|
||||
CONFIG_SND_SOC_TEGRA_RT5640=y
|
||||
CONFIG_SND_SOC_TEGRA_WM8753=y
|
||||
CONFIG_SND_SOC_TEGRA_WM8903=y
|
||||
CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
|
||||
CONFIG_SND_SOC_TEGRA_ALC5632=y
|
||||
CONFIG_SND_SOC_TEGRA_MAX98090=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
|
|
@ -132,8 +241,6 @@ CONFIG_USB_STORAGE=y
|
|||
CONFIG_USB_CHIPIDEA=y
|
||||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_AB8500_USB=y
|
||||
CONFIG_NOP_USB_XCEIV=y
|
||||
CONFIG_OMAP_USB2=y
|
||||
CONFIG_OMAP_USB3=y
|
||||
CONFIG_SAMSUNG_USB2PHY=y
|
||||
CONFIG_SAMSUNG_USB3PHY=y
|
||||
|
|
@ -144,24 +251,32 @@ CONFIG_MMC=y
|
|||
CONFIG_MMC_BLOCK_MINORS=16
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MMC_SDHCI_ESDHC_IMX=y
|
||||
CONFIG_MMC_SDHCI_TEGRA=y
|
||||
CONFIG_MMC_SDHCI_SPEAR=y
|
||||
CONFIG_MMC_SDHCI_BCM_KONA=y
|
||||
CONFIG_MMC_OMAP=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_MMC_MVSDIO=y
|
||||
CONFIG_EDAC=y
|
||||
CONFIG_EDAC_MM_EDAC=y
|
||||
CONFIG_EDAC_HIGHBANK_MC=y
|
||||
CONFIG_EDAC_HIGHBANK_L2=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AS3722=y
|
||||
CONFIG_RTC_DRV_MAX8907=y
|
||||
CONFIG_RTC_DRV_PALMAS=y
|
||||
CONFIG_RTC_DRV_TWL4030=y
|
||||
CONFIG_RTC_DRV_TPS6586X=y
|
||||
CONFIG_RTC_DRV_TPS65910=y
|
||||
CONFIG_RTC_DRV_EM3027=y
|
||||
CONFIG_RTC_DRV_PL031=y
|
||||
CONFIG_RTC_DRV_VT8500=y
|
||||
CONFIG_RTC_DRV_MV=y
|
||||
CONFIG_RTC_DRV_TEGRA=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DW_DMAC=y
|
||||
CONFIG_MV_XOR=y
|
||||
CONFIG_TEGRA20_APB_DMA=y
|
||||
CONFIG_STE_DMA40=y
|
||||
CONFIG_SIRF_DMA=y
|
||||
|
|
@ -171,15 +286,34 @@ CONFIG_IMX_SDMA=y
|
|||
CONFIG_IMX_DMA=y
|
||||
CONFIG_MXS_DMA=y
|
||||
CONFIG_DMA_OMAP=y
|
||||
CONFIG_STAGING=y
|
||||
CONFIG_SENSORS_ISL29018=y
|
||||
CONFIG_SENSORS_ISL29028=y
|
||||
CONFIG_MFD_NVEC=y
|
||||
CONFIG_KEYBOARD_NVEC=y
|
||||
CONFIG_SERIO_NVEC_PS2=y
|
||||
CONFIG_NVEC_POWER=y
|
||||
CONFIG_TEGRA_IOMMU_GART=y
|
||||
CONFIG_TEGRA_IOMMU_SMMU=y
|
||||
CONFIG_MEMORY=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_AK8975=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_TEGRA=y
|
||||
CONFIG_PWM_VT8500=y
|
||||
CONFIG_OMAP_USB2=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_SQUASHFS=y
|
||||
CONFIG_SQUASHFS_LZO=y
|
||||
CONFIG_SQUASHFS_XZ=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_LOCKUP_DETECTOR=y
|
||||
CONFIG_CRYPTO_DEV_TEGRA_AES=y
|
||||
|
|
|
|||
|
|
@ -29,11 +29,11 @@ CONFIG_ARCH_TEGRA_3x_SOC=y
|
|||
CONFIG_ARCH_TEGRA_114_SOC=y
|
||||
CONFIG_ARCH_TEGRA_124_SOC=y
|
||||
CONFIG_TEGRA_EMC_SCALING_ENABLE=y
|
||||
CONFIG_TRUSTED_FOUNDATIONS=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_TEGRA=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_TRUSTED_FOUNDATIONS=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_AEABI=y
|
||||
|
|
@ -125,7 +125,6 @@ CONFIG_SERIAL_TEGRA=y
|
|||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_I2C_COMPAT is not set
|
||||
CONFIG_I2C_MUX=y
|
||||
CONFIG_I2C_MUX_PINCTRL=y
|
||||
CONFIG_I2C_TEGRA=y
|
||||
CONFIG_SPI=y
|
||||
|
|
@ -169,9 +168,8 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y
|
|||
CONFIG_MEDIA_USB_SUPPORT=y
|
||||
CONFIG_USB_VIDEO_CLASS=m
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_PANEL=y
|
||||
CONFIG_DRM_PANEL_SIMPLE=y
|
||||
CONFIG_DRM_TEGRA=y
|
||||
CONFIG_DRM_PANEL_SIMPLE=y
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
|
|
@ -206,10 +204,7 @@ CONFIG_MMC_BLOCK_MINORS=16
|
|||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MMC_SDHCI_TEGRA=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_ONESHOT=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
|
|
@ -235,7 +230,6 @@ CONFIG_KEYBOARD_NVEC=y
|
|||
CONFIG_SERIO_NVEC_PS2=y
|
||||
CONFIG_NVEC_POWER=y
|
||||
CONFIG_NVEC_PAZ00=y
|
||||
CONFIG_COMMON_CLK_DEBUG=y
|
||||
CONFIG_TEGRA_IOMMU_GART=y
|
||||
CONFIG_TEGRA_IOMMU_SMMU=y
|
||||
CONFIG_MEMORY=y
|
||||
|
|
@ -265,6 +259,7 @@ CONFIG_NLS_CODEPAGE_437=y
|
|||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_SLAB=y
|
||||
CONFIG_DEBUG_VM=y
|
||||
|
|
|
|||
|
|
@ -12,6 +12,5 @@ config ARCH_HI3xxx
|
|||
select HAVE_SMP
|
||||
select PINCTRL
|
||||
select PINCTRL_SINGLE
|
||||
select SMP
|
||||
help
|
||||
Support for Hisilicon Hi36xx/Hi37xx processor family
|
||||
|
|
|
|||
|
|
@ -64,6 +64,7 @@ static void __iomem *intcp_con_base;
|
|||
|
||||
/*
|
||||
* Logical Physical
|
||||
* f1000000 10000000 Core module registers
|
||||
* f1300000 13000000 Counter/Timer
|
||||
* f1400000 14000000 Interrupt controller
|
||||
* f1600000 16000000 UART 0
|
||||
|
|
@ -75,6 +76,11 @@ static void __iomem *intcp_con_base;
|
|||
|
||||
static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {
|
||||
{
|
||||
.virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
|
||||
.pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE
|
||||
}, {
|
||||
.virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
|
||||
.pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
|
||||
.length = SZ_4K,
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/irq.h>
|
||||
|
|
@ -176,12 +177,36 @@ static struct platform_device em7210_serial_device = {
|
|||
.resource = &em7210_uart_resource,
|
||||
};
|
||||
|
||||
#define EM7210_HARDWARE_POWER 0
|
||||
|
||||
void em7210_power_off(void)
|
||||
{
|
||||
*IOP3XX_GPOE &= 0xfe;
|
||||
*IOP3XX_GPOD |= 0x01;
|
||||
int ret;
|
||||
|
||||
ret = gpio_direction_output(EM7210_HARDWARE_POWER, 1);
|
||||
if (ret)
|
||||
pr_crit("could not drive power off GPIO high\n");
|
||||
}
|
||||
|
||||
static int __init em7210_request_gpios(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (!machine_is_em7210())
|
||||
return 0;
|
||||
|
||||
ret = gpio_request(EM7210_HARDWARE_POWER, "power");
|
||||
if (ret) {
|
||||
pr_err("could not request power off GPIO\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
pm_power_off = em7210_power_off;
|
||||
|
||||
return 0;
|
||||
}
|
||||
device_initcall(em7210_request_gpios);
|
||||
|
||||
static void __init em7210_init_machine(void)
|
||||
{
|
||||
register_iop32x_gpio();
|
||||
|
|
@ -194,9 +219,6 @@ static void __init em7210_init_machine(void)
|
|||
|
||||
i2c_register_board_info(0, em7210_i2c_devices,
|
||||
ARRAY_SIZE(em7210_i2c_devices));
|
||||
|
||||
|
||||
pm_power_off = em7210_power_off;
|
||||
}
|
||||
|
||||
MACHINE_START(EM7210, "Lanner EM7210")
|
||||
|
|
|
|||
|
|
@ -10,7 +10,6 @@ config ARCH_KEYSTONE
|
|||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select ARM_ERRATA_798181 if SMP
|
||||
select COMMON_CLK_KEYSTONE
|
||||
select TI_EDMA
|
||||
select ARCH_SUPPORTS_BIG_ENDIAN
|
||||
select ZONE_DMA if ARM_LPAE
|
||||
help
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
#include <linux/suspend.h>
|
||||
#include <linux/io.h>
|
||||
#include <mach/bridge-regs.h>
|
||||
#include "common.h"
|
||||
|
||||
static void __iomem *ddr_operation_base;
|
||||
|
||||
|
|
@ -65,9 +66,8 @@ static const struct platform_suspend_ops kirkwood_suspend_ops = {
|
|||
.valid = kirkwood_pm_valid_standby,
|
||||
};
|
||||
|
||||
int __init kirkwood_pm_init(void)
|
||||
void __init kirkwood_pm_init(void)
|
||||
{
|
||||
ddr_operation_base = ioremap(DDR_OPERATION_BASE, 4);
|
||||
suspend_set_ops(&kirkwood_suspend_ops);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -88,7 +88,7 @@ static int __init mvebu_soc_id_init(void)
|
|||
}
|
||||
|
||||
pci_base = of_iomap(child, 0);
|
||||
if (IS_ERR(pci_base)) {
|
||||
if (pci_base == NULL) {
|
||||
pr_err("cannot map registers\n");
|
||||
ret = -ENOMEM;
|
||||
goto res_ioremap;
|
||||
|
|
|
|||
|
|
@ -62,11 +62,17 @@ static inline int omap3_pm_init(void)
|
|||
|
||||
#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
|
||||
int omap4_pm_init(void);
|
||||
int omap4_pm_init_early(void);
|
||||
#else
|
||||
static inline int omap4_pm_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int omap4_pm_init_early(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
|
|
@ -236,6 +242,7 @@ static inline void __iomem *omap4_get_scu_base(void)
|
|||
|
||||
extern void __init gic_init_irq(void);
|
||||
extern void gic_dist_disable(void);
|
||||
extern void gic_dist_enable(void);
|
||||
extern bool gic_dist_disabled(void);
|
||||
extern void gic_timer_retrigger(void);
|
||||
extern void omap_smc1(u32 fn, u32 arg);
|
||||
|
|
|
|||
|
|
@ -80,6 +80,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
|
|||
int index)
|
||||
{
|
||||
struct idle_statedata *cx = state_ptr + index;
|
||||
u32 mpuss_can_lose_context = 0;
|
||||
|
||||
/*
|
||||
* CPU0 has to wait and stay ON until CPU1 is OFF state.
|
||||
|
|
@ -104,6 +105,9 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
|
|||
}
|
||||
}
|
||||
|
||||
mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
|
||||
(cx->mpu_logic_state == PWRDM_POWER_OFF);
|
||||
|
||||
/*
|
||||
* Call idle CPU PM enter notifier chain so that
|
||||
* VFP and per CPU interrupt context is saved.
|
||||
|
|
@ -118,9 +122,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
|
|||
* Call idle CPU cluster PM enter notifier chain
|
||||
* to save GIC and wakeupgen context.
|
||||
*/
|
||||
if ((cx->mpu_state == PWRDM_POWER_RET) &&
|
||||
(cx->mpu_logic_state == PWRDM_POWER_OFF))
|
||||
cpu_cluster_pm_enter();
|
||||
if (mpuss_can_lose_context)
|
||||
cpu_cluster_pm_enter();
|
||||
}
|
||||
|
||||
omap4_enter_lowpower(dev->cpu, cx->cpu_state);
|
||||
|
|
@ -128,9 +131,23 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
|
|||
|
||||
/* Wakeup CPU1 only if it is not offlined */
|
||||
if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
|
||||
|
||||
if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
|
||||
mpuss_can_lose_context)
|
||||
gic_dist_disable();
|
||||
|
||||
clkdm_wakeup(cpu_clkdm[1]);
|
||||
omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON);
|
||||
clkdm_allow_idle(cpu_clkdm[1]);
|
||||
|
||||
if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
|
||||
mpuss_can_lose_context) {
|
||||
while (gic_dist_disabled()) {
|
||||
udelay(1);
|
||||
cpu_relax();
|
||||
}
|
||||
gic_timer_retrigger();
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -143,8 +160,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
|
|||
* Call idle CPU cluster PM exit notifier chain
|
||||
* to restore GIC and wakeupgen context.
|
||||
*/
|
||||
if (dev->cpu == 0 && (cx->mpu_state == PWRDM_POWER_RET) &&
|
||||
(cx->mpu_logic_state == PWRDM_POWER_OFF))
|
||||
if (dev->cpu == 0 && mpuss_can_lose_context)
|
||||
cpu_cluster_pm_exit();
|
||||
|
||||
fail:
|
||||
|
|
|
|||
|
|
@ -641,6 +641,7 @@ void __init omap4430_init_early(void)
|
|||
omap_cm_base_init();
|
||||
omap4xxx_check_revision();
|
||||
omap4xxx_check_features();
|
||||
omap4_pm_init_early();
|
||||
omap44xx_prm_init();
|
||||
omap44xx_voltagedomains_init();
|
||||
omap44xx_powerdomains_init();
|
||||
|
|
|
|||
|
|
@ -271,6 +271,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
|
|||
else
|
||||
omap_pm_ops.finish_suspend(save_state);
|
||||
|
||||
if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) && cpu)
|
||||
gic_dist_enable();
|
||||
|
||||
/*
|
||||
* Restore the CPUx power state to ON otherwise CPUx
|
||||
* power domain can transitions to programmed low power
|
||||
|
|
|
|||
|
|
@ -39,8 +39,6 @@
|
|||
|
||||
#define OMAP5_CORE_COUNT 0x2
|
||||
|
||||
u16 pm44xx_errata;
|
||||
|
||||
/* SCU base address */
|
||||
static void __iomem *scu_base;
|
||||
|
||||
|
|
@ -217,10 +215,8 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
|
|||
if (scu_base)
|
||||
scu_enable(scu_base);
|
||||
|
||||
if (cpu_is_omap446x()) {
|
||||
if (cpu_is_omap446x())
|
||||
startup_addr = omap4460_secondary_startup;
|
||||
pm44xx_errata |= PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD;
|
||||
}
|
||||
|
||||
/*
|
||||
* Write the address of secondary startup routine into the
|
||||
|
|
|
|||
|
|
@ -127,6 +127,12 @@ void gic_dist_disable(void)
|
|||
__raw_writel(0x0, gic_dist_base_addr + GIC_DIST_CTRL);
|
||||
}
|
||||
|
||||
void gic_dist_enable(void)
|
||||
{
|
||||
if (gic_dist_base_addr)
|
||||
__raw_writel(0x1, gic_dist_base_addr + GIC_DIST_CTRL);
|
||||
}
|
||||
|
||||
bool gic_dist_disabled(void)
|
||||
{
|
||||
return !(__raw_readl(gic_dist_base_addr + GIC_DIST_CTRL) & 0x1);
|
||||
|
|
|
|||
|
|
@ -24,6 +24,8 @@
|
|||
#include "powerdomain.h"
|
||||
#include "pm.h"
|
||||
|
||||
u16 pm44xx_errata;
|
||||
|
||||
struct power_state {
|
||||
struct powerdomain *pwrdm;
|
||||
u32 next_state;
|
||||
|
|
@ -198,6 +200,19 @@ static inline int omap4_init_static_deps(void)
|
|||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap4_pm_init_early - Does early initialization necessary for OMAP4+ devices
|
||||
*
|
||||
* Initializes basic stuff for power management functionality.
|
||||
*/
|
||||
int __init omap4_pm_init_early(void)
|
||||
{
|
||||
if (cpu_is_omap446x())
|
||||
pm44xx_errata |= PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap4_pm_init - Init routine for OMAP4+ devices
|
||||
*
|
||||
|
|
|
|||
|
|
@ -15,8 +15,51 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <asm/exception.h>
|
||||
#include <plat/irq.h>
|
||||
#include <plat/orion-gpio.h>
|
||||
#include <mach/bridge-regs.h>
|
||||
|
||||
#ifdef CONFIG_MULTI_IRQ_HANDLER
|
||||
/*
|
||||
* Compiling with both non-DT and DT support enabled, will
|
||||
* break asm irq handler used by non-DT boards. Therefore,
|
||||
* we provide a C-style irq handler even for non-DT boards,
|
||||
* if MULTI_IRQ_HANDLER is set.
|
||||
*
|
||||
* Notes:
|
||||
* - this is prepared for Kirkwood and Dove only, update
|
||||
* accordingly if you add Orion5x or MV78x00.
|
||||
* - Orion5x uses different macro names and has only one
|
||||
* set of CAUSE/MASK registers.
|
||||
* - MV78x00 uses the same macro names but has a third
|
||||
* set of CAUSE/MASK registers.
|
||||
*
|
||||
*/
|
||||
|
||||
static void __iomem *orion_irq_base = IRQ_VIRT_BASE;
|
||||
|
||||
asmlinkage void
|
||||
__exception_irq_entry orion_legacy_handle_irq(struct pt_regs *regs)
|
||||
{
|
||||
u32 stat;
|
||||
|
||||
stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_LOW_OFF);
|
||||
stat &= readl_relaxed(orion_irq_base + IRQ_MASK_LOW_OFF);
|
||||
if (stat) {
|
||||
unsigned int hwirq = __fls(stat);
|
||||
handle_IRQ(hwirq, regs);
|
||||
return;
|
||||
}
|
||||
stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_HIGH_OFF);
|
||||
stat &= readl_relaxed(orion_irq_base + IRQ_MASK_HIGH_OFF);
|
||||
if (stat) {
|
||||
unsigned int hwirq = 32 + __fls(stat);
|
||||
handle_IRQ(hwirq, regs);
|
||||
return;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
|
||||
{
|
||||
|
|
@ -35,6 +78,10 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
|
|||
ct->chip.irq_unmask = irq_gc_mask_set_bit;
|
||||
irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
|
||||
IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
|
||||
|
||||
#ifdef CONFIG_MULTI_IRQ_HANDLER
|
||||
set_handle_irq(orion_legacy_handle_irq);
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
|
|
|
|||
|
|
@ -979,7 +979,7 @@ static int cci_probe(void)
|
|||
|
||||
nb_cci_ports = cci_config->nb_ace + cci_config->nb_ace_lite;
|
||||
|
||||
ports = kcalloc(sizeof(*ports), nb_cci_ports, GFP_KERNEL);
|
||||
ports = kcalloc(nb_cci_ports, sizeof(*ports), GFP_KERNEL);
|
||||
if (!ports)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
#include <linux/jiffies.h>
|
||||
#include <linux/clockchips.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/clk.h>
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
|
@ -101,11 +102,18 @@ kona_timer_get_counter(void *timer_base, uint32_t *msw, uint32_t *lsw)
|
|||
static void __init kona_timers_init(struct device_node *node)
|
||||
{
|
||||
u32 freq;
|
||||
struct clk *external_clk;
|
||||
|
||||
if (!of_property_read_u32(node, "clock-frequency", &freq))
|
||||
external_clk = of_clk_get_by_name(node, NULL);
|
||||
|
||||
if (!IS_ERR(external_clk)) {
|
||||
arch_timer_rate = clk_get_rate(external_clk);
|
||||
clk_prepare_enable(external_clk);
|
||||
} else if (!of_property_read_u32(node, "clock-frequency", &freq)) {
|
||||
arch_timer_rate = freq;
|
||||
else
|
||||
panic("clock-frequency not set in the .dts file");
|
||||
} else {
|
||||
panic("unable to determine clock-frequency");
|
||||
}
|
||||
|
||||
/* Setup IRQ numbers */
|
||||
timers.tmr_irq = irq_of_parse_and_map(node, 0);
|
||||
|
|
|
|||
|
|
@ -59,8 +59,6 @@
|
|||
#define PCI_MSI_DOORBELL_END (32)
|
||||
#define PCI_MSI_DOORBELL_MASK 0xFFFF0000
|
||||
|
||||
static DEFINE_RAW_SPINLOCK(irq_controller_lock);
|
||||
|
||||
static void __iomem *per_cpu_int_base;
|
||||
static void __iomem *main_int_base;
|
||||
static struct irq_domain *armada_370_xp_mpic_domain;
|
||||
|
|
@ -239,6 +237,8 @@ static inline int armada_370_xp_msi_init(struct device_node *node,
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static DEFINE_RAW_SPINLOCK(irq_controller_lock);
|
||||
|
||||
static int armada_xp_set_affinity(struct irq_data *d,
|
||||
const struct cpumask *mask_val, bool force)
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in New Issue