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ARM: dts: marzen: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -165,6 +165,9 @@ &tmu0 {
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};
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&pfc {
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pinctrl-0 = <&scif_clk_pins>;
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pinctrl-names = "default";
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du_pins: du {
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du0 {
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renesas,groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
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@ -176,6 +179,11 @@ du1 {
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};
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};
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scif_clk_pins: scif_clk {
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renesas,groups = "scif_clk_b";
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renesas,function = "scif_clk";
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};
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ethernet_pins: ethernet {
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intc {
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renesas,groups = "intc_irq1_b";
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@ -222,6 +230,11 @@ &scif4 {
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status = "okay";
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};
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&scif_clk {
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clock-frequency = <14745600>;
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status = "okay";
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-names = "default";
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