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clk: imx: clk-pllv3: Switch to clk_hw based API 

Switch the imx_clk_hw_pllv3 function to clk_hw based API, rename
accordingly and add a macro for clk based legacy. This allows us
to move closer to a clear split between consumer and provider clk
APIs.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Abel Vesa 2019-05-29 12:26:43 +00:00 committed by Shawn Guo
parent 1f9aec9662
commit e5674a4d07
2 changed files with 13 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/clk/imx/clk-pllv3.c
View File

@ -416,14 +416,15 @@ static const struct clk_ops clk_pllv3_enet_ops = {
.recalc_rate = clk_pllv3_enet_recalc_rate, .recalc_rate = clk_pllv3_enet_recalc_rate,
}; };
struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name,
const char *parent_name, void __iomem *base, const char *parent_name, void __iomem *base,
u32 div_mask) u32 div_mask)
{ {
struct clk_pllv3 *pll; struct clk_pllv3 *pll;
const struct clk_ops *ops; const struct clk_ops *ops;
struct clk *clk; struct clk_hw *hw;
struct clk_init_data init; struct clk_init_data init;
int ret;
pll = kzalloc(sizeof(*pll), GFP_KERNEL); pll = kzalloc(sizeof(*pll), GFP_KERNEL);
if (!pll) if (!pll)
@ -484,10 +485,13 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
init.num_parents = 1; init.num_parents = 1;
pll->hw.init = &init; pll->hw.init = &init;
hw = &pll->hw;
clk = clk_register(NULL, &pll->hw); ret = clk_hw_register(NULL, hw);
if (IS_ERR(clk)) if (ret) {
kfree(pll); kfree(pll);
return ERR_PTR(ret);
return clk; }
return hw;
} }

5
drivers/clk/imx/clk.h
View File

@ -64,6 +64,9 @@ struct imx_pll14xx_clk {
clk_hw_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \ clk_hw_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \
cgr_val, clk_gate_flags, lock, share_count)->clk cgr_val, clk_gate_flags, lock, share_count)->clk
#define imx_clk_pllv3(type, name, parent_name, base, div_mask) \
imx_clk_hw_pllv3(type, name, parent_name, base, div_mask)->clk
struct clk *imx_clk_pll14xx(const char *name, const char *parent_name, struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
void __iomem *base, const struct imx_pll14xx_clk *pll_clk); void __iomem *base, const struct imx_pll14xx_clk *pll_clk);
@ -96,7 +99,7 @@ enum imx_pllv3_type {
IMX_PLLV3_AV_IMX7, IMX_PLLV3_AV_IMX7,
}; };
struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name,
const char *parent_name, void __iomem *base, u32 div_mask); const char *parent_name, void __iomem *base, u32 div_mask);
struct clk_hw *imx_clk_pllv4(const char *name, const char *parent_name, struct clk_hw *imx_clk_pllv4(const char *name, const char *parent_name,