mirror of https://gitee.com/openkylin/linux.git
pm2fb: Permedia 2V memory clock setting
Permedia 2V uses its own registers to set a memory clock. The patch adds these registers and uses them in the set_memclock() function. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -462,21 +462,43 @@ static void set_memclock(struct pm2fb_par* par, u32 clk)
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int i;
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unsigned char m, n, p;
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pm2_mnp(clk, &m, &n, &p);
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WAIT_FIFO(par, 10);
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pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 6);
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wmb();
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pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_1, m);
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pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_2, n);
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wmb();
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pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 8|p);
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wmb();
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pm2_RDAC_RD(par, PM2I_RD_MEMORY_CLOCK_STATUS);
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rmb();
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for (i = 256;
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i && !(pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED);
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i--)
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;
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switch (par->type) {
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case PM2_TYPE_PERMEDIA2V:
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pm2v_mnp(clk/2, &m, &n, &p);
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WAIT_FIFO(par, 8);
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pm2_WR(par, PM2VR_RD_INDEX_HIGH, PM2VI_RD_MCLK_CONTROL >> 8);
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pm2v_RDAC_WR(par, PM2VI_RD_MCLK_CONTROL, 0);
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wmb();
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pm2v_RDAC_WR(par, PM2VI_RD_MCLK_PRESCALE, m);
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pm2v_RDAC_WR(par, PM2VI_RD_MCLK_FEEDBACK, n);
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pm2v_RDAC_WR(par, PM2VI_RD_MCLK_POSTSCALE, p);
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wmb();
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pm2v_RDAC_WR(par, PM2VI_RD_MCLK_CONTROL, 1);
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rmb();
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for (i = 256;
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i && !(pm2_RDAC_RD(par, PM2VI_RD_MCLK_CONTROL) & 2);
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i--)
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;
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pm2_WR(par, PM2VR_RD_INDEX_HIGH, 0);
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break;
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case PM2_TYPE_PERMEDIA2:
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pm2_mnp(clk, &m, &n, &p);
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WAIT_FIFO(par, 10);
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pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 6);
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wmb();
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pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_1, m);
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pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_2, n);
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wmb();
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pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 8|p);
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wmb();
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pm2_RDAC_RD(par, PM2I_RD_MEMORY_CLOCK_STATUS);
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rmb();
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for (i = 256;
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i && !(pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED);
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i--)
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;
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break;
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}
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}
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static void set_pixclock(struct pm2fb_par* par, u32 clk)
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@ -154,6 +154,10 @@
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#define PM2VI_RD_CLK1_PRESCALE 0x204
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#define PM2VI_RD_CLK1_FEEDBACK 0x205
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#define PM2VI_RD_CLK1_POSTSCALE 0x206
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#define PM2VI_RD_MCLK_CONTROL 0x20D
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#define PM2VI_RD_MCLK_PRESCALE 0x20E
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#define PM2VI_RD_MCLK_FEEDBACK 0x20F
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#define PM2VI_RD_MCLK_POSTSCALE 0x210
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#define PM2VI_RD_CURSOR_PALETTE 0x303
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#define PM2VI_RD_CURSOR_PATTERN 0x400
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