mirror of https://gitee.com/openkylin/linux.git
drm/i915/kbl: Init gen9 workarounds
Kabylake is part of gen9 family so init the generic gen9 workarounds for it. v2: rebase Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1465309159-30531-3-git-send-email-mika.kuoppala@intel.com
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@ -911,21 +911,21 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
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uint32_t tmp;
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int ret;
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/* WaEnableLbsSlaRetryTimerDecrement:skl */
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/* WaEnableLbsSlaRetryTimerDecrement:skl,bxt,kbl */
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I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |
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GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);
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/* WaDisableKillLogic:bxt,skl */
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/* WaDisableKillLogic:bxt,skl,kbl */
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I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
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ECOCHK_DIS_TLB);
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/* WaClearFlowControlGpgpuContextSave:skl,bxt */
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/* WaDisablePartialInstShootdown:skl,bxt */
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/* WaClearFlowControlGpgpuContextSave:skl,bxt,kbl */
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/* WaDisablePartialInstShootdown:skl,bxt,kbl */
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WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
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FLOW_CONTROL_ENABLE |
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PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE);
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/* Syncing dependencies between camera and graphics:skl,bxt */
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/* Syncing dependencies between camera and graphics:skl,bxt,kbl */
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WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
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GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC);
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@ -947,18 +947,18 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
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*/
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}
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/* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt */
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/* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt */
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/* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt,kbl */
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/* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt,kbl */
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WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
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GEN9_ENABLE_YV12_BUGFIX |
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GEN9_ENABLE_GPGPU_PREEMPTION);
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/* Wa4x4STCOptimizationDisable:skl,bxt */
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/* WaDisablePartialResolveInVc:skl,bxt */
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/* Wa4x4STCOptimizationDisable:skl,bxt,kbl */
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/* WaDisablePartialResolveInVc:skl,bxt,kbl */
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WA_SET_BIT_MASKED(CACHE_MODE_1, (GEN8_4x4_STC_OPTIMIZATION_DISABLE |
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GEN9_PARTIAL_RESOLVE_IN_VC_DISABLE));
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/* WaCcsTlbPrefetchDisable:skl,bxt */
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/* WaCcsTlbPrefetchDisable:skl,bxt,kbl */
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WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5,
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GEN9_CCS_TLB_PREFETCH_ENABLE);
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@ -975,15 +975,17 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
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tmp |= HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE;
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WA_SET_BIT_MASKED(HDC_CHICKEN0, tmp);
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/* WaDisableSamplerPowerBypassForSOPingPong:skl,bxt */
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if (IS_SKYLAKE(dev_priv) || IS_BXT_REVID(dev_priv, 0, BXT_REVID_B0))
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/* WaDisableSamplerPowerBypassForSOPingPong:skl,bxt,kbl */
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if (IS_SKYLAKE(dev_priv) ||
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IS_KABYLAKE(dev_priv) ||
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IS_BXT_REVID(dev_priv, 0, BXT_REVID_B0))
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WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
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GEN8_SAMPLER_POWER_BYPASS_DIS);
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/* WaDisableSTUnitPowerOptimization:skl,bxt */
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/* WaDisableSTUnitPowerOptimization:skl,bxt,kbl */
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WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);
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/* WaOCLCoherentLineFlush:skl,bxt */
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/* WaOCLCoherentLineFlush:skl,bxt,kbl */
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I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) |
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GEN8_LQSC_FLUSH_COHERENT_LINES));
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@ -992,12 +994,12 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
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if (ret)
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return ret;
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/* WaEnablePreemptionGranularityControlByUMD:skl,bxt */
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/* WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl */
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ret= wa_ring_whitelist_reg(engine, GEN8_CS_CHICKEN1);
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if (ret)
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return ret;
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/* WaAllowUMDToModifyHDCChicken1:skl,bxt */
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/* WaAllowUMDToModifyHDCChicken1:skl,bxt,kbl */
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ret = wa_ring_whitelist_reg(engine, GEN8_HDC_CHICKEN1);
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if (ret)
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return ret;
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@ -1182,6 +1184,17 @@ static int bxt_init_workarounds(struct intel_engine_cs *engine)
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return 0;
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}
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static int kbl_init_workarounds(struct intel_engine_cs *engine)
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{
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int ret;
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ret = gen9_init_workarounds(engine);
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if (ret)
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return ret;
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return 0;
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}
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int init_workarounds_ring(struct intel_engine_cs *engine)
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{
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struct drm_i915_private *dev_priv = engine->i915;
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@ -1203,6 +1216,9 @@ int init_workarounds_ring(struct intel_engine_cs *engine)
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if (IS_BROXTON(dev_priv))
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return bxt_init_workarounds(engine);
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if (IS_KABYLAKE(dev_priv))
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return kbl_init_workarounds(engine);
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return 0;
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}
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