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drm/i915: Set scaler mode for NV12
This patch sets appropriate scaler mode for NV12 format. In this mode, skylake scaler does either chroma-upsampling or chroma-upsampling and resolution scaling v2: Review comments from Ville addressed NV12 case to be checked first for setting the scaler v3: Rebased (me) v4: Rebased (me) v5: Missed the Tested-by/Reviewed-by in the previous series Adding the same to commit message in this version. v6: Rebased (me) v7: Rebased (me) v8: Rebased (me) Restricting the NV12 change for scaler to BXT and KBL in this series. v9: Rebased (me) v10: As of now, NV12 has been tested on Gen9 and Gen10. However, code is applicable to all GEN >= 9. Hence making that change to keep it generic. Comments under v8 is not valid anymore. v11: Addressed review comments by Shashank Sharma. For Gen10+, the scaler mode to be set it planar or normal (single bit). Changed the code to be applicable to all Gen. v12: Addressed review comments from Shashank Sharma For Gen9 (apart from GLK) bits 28:29 to be programmed in PS_CTRL for NV12. For GLK and Gen10+, bit 29 to be set for all Planar. v13: Addressed review comments from Juha-Pekka Heikkila "NV12 not to be supported by SKL" Adding Reviewed by tag from Shashank Shamr v14: Added reviewed by from Juha-Pekka Heikkila v15: Rebased the series Tested-by: Clinton Taylor <clinton.a.taylor@intel.com> Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1523245273-30264-13-git-send-email-vidya.srinivas@intel.com
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@ -6664,6 +6664,8 @@ enum {
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#define PS_SCALER_MODE_MASK (3 << 28)
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#define PS_SCALER_MODE_DYN (0 << 28)
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#define PS_SCALER_MODE_HQ (1 << 28)
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#define SKL_PS_SCALER_MODE_NV12 (2 << 28)
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#define PS_SCALER_MODE_PLANAR (1 << 29)
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#define PS_PLANE_SEL_MASK (7 << 25)
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#define PS_PLANE_SEL(plane) (((plane) + 1) << 25)
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#define PS_FILTER_MASK (3 << 23)
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@ -328,8 +328,18 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
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}
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/* set scaler mode */
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if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
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scaler_state->scalers[*scaler_id].mode = 0;
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if ((INTEL_GEN(dev_priv) >= 9) &&
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plane_state && plane_state->base.fb &&
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plane_state->base.fb->format->format ==
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DRM_FORMAT_NV12) {
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if (INTEL_GEN(dev_priv) == 9 &&
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!IS_GEMINILAKE(dev_priv) &&
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!IS_SKYLAKE(dev_priv))
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scaler_state->scalers[*scaler_id].mode =
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SKL_PS_SCALER_MODE_NV12;
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else
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scaler_state->scalers[*scaler_id].mode =
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PS_SCALER_MODE_PLANAR;
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} else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
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/*
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* when only 1 scaler is in use on either pipe A or B,
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