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ASoC: cs42l42: Fix Bitclock polarity inversion 

The driver was setting bit clock polarity opposite to intended polarity.
Also simplify the code by grouping ADC and DAC clock configurations into
a single field.

Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20210305173442.195740-2-tanureal@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Lucas Tanure 2021-03-05 17:34:28 +00:00 committed by Mark Brown
parent 7de14d581d
commit e793c96551
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
2 changed files with 14 additions and 17 deletions
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20
sound/soc/codecs/cs42l42.c
View File

@ -797,27 +797,23 @@ static int cs42l42_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
/* Bitclock/frame inversion */
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_NF:
asp_cfg_val |= CS42L42_ASP_SCPOL_NOR << CS42L42_ASP_SCPOL_SHIFT;
break;
case SND_SOC_DAIFMT_NB_IF:
asp_cfg_val |= CS42L42_ASP_POL_INV <<
CS42L42_ASP_LCPOL_IN_SHIFT;
asp_cfg_val |= CS42L42_ASP_SCPOL_NOR << CS42L42_ASP_SCPOL_SHIFT;
asp_cfg_val |= CS42L42_ASP_LCPOL_INV << CS42L42_ASP_LCPOL_SHIFT;
break;
case SND_SOC_DAIFMT_IB_NF:
asp_cfg_val |= CS42L42_ASP_POL_INV <<
CS42L42_ASP_SCPOL_IN_DAC_SHIFT;
break;
case SND_SOC_DAIFMT_IB_IF:
asp_cfg_val |= CS42L42_ASP_POL_INV <<
CS42L42_ASP_LCPOL_IN_SHIFT;
asp_cfg_val |= CS42L42_ASP_POL_INV <<
CS42L42_ASP_SCPOL_IN_DAC_SHIFT;
asp_cfg_val |= CS42L42_ASP_LCPOL_INV << CS42L42_ASP_LCPOL_SHIFT;
break;
}
snd_soc_component_update_bits(component, CS42L42_ASP_CLK_CFG,
CS42L42_ASP_MODE_MASK |
CS42L42_ASP_SCPOL_IN_DAC_MASK |
CS42L42_ASP_LCPOL_IN_MASK, asp_cfg_val);
snd_soc_component_update_bits(component, CS42L42_ASP_CLK_CFG, CS42L42_ASP_MODE_MASK |
CS42L42_ASP_SCPOL_MASK |
CS42L42_ASP_LCPOL_MASK,
asp_cfg_val);
return 0;
}

11
sound/soc/codecs/cs42l42.h
View File

@ -258,11 +258,12 @@
#define CS42L42_ASP_SLAVE_MODE 0x00
#define CS42L42_ASP_MODE_SHIFT 4
#define CS42L42_ASP_MODE_MASK (1 << CS42L42_ASP_MODE_SHIFT)
#define CS42L42_ASP_SCPOL_IN_DAC_SHIFT 2
#define CS42L42_ASP_SCPOL_IN_DAC_MASK (1 << CS42L42_ASP_SCPOL_IN_DAC_SHIFT)
#define CS42L42_ASP_LCPOL_IN_SHIFT 0
#define CS42L42_ASP_LCPOL_IN_MASK (1 << CS42L42_ASP_LCPOL_IN_SHIFT)
#define CS42L42_ASP_POL_INV 1
#define CS42L42_ASP_SCPOL_SHIFT 2
#define CS42L42_ASP_SCPOL_MASK (3 << CS42L42_ASP_SCPOL_SHIFT)
#define CS42L42_ASP_SCPOL_NOR 3
#define CS42L42_ASP_LCPOL_SHIFT 0
#define CS42L42_ASP_LCPOL_MASK (3 << CS42L42_ASP_LCPOL_SHIFT)
#define CS42L42_ASP_LCPOL_INV 3
#define CS42L42_ASP_FRM_CFG (CS42L42_PAGE_12 + 0x08)
#define CS42L42_ASP_STP_SHIFT 4