mirror of https://gitee.com/openkylin/linux.git
arm64: dts: Amlogic updates for v5.1
- new board: G12a-based x96 max - G12a: add peripheral clock controller and clock measure support - s400: fix SD/eMMC max rate issues - s400: audio: add sp/dif in support - GX: support simplefb -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlxh3OEACgkQWTcYmtP7 xmUzig/9H+BF3/sgQaa7Om4Bj58V0/F7Q+OFgWl8ZFmYRmtxb5COSnpjLIwp2OMf Hry6UqG3sr2/+34vDK//bctriO1JweXDZdvPGMm+J/nss2SzqO6MIbBUjhr2PJJS /xcApBX3V5Zju+1YFf0hYPWuRo+RLsdE0ENmu2Q41HTuuyrkEtcqx+MRYpz7I6Pw z3FF2SbZ1DRQcVNdhYlRmApSvBswNgagRXZOKDr9Je8vFr4+XYDrJ8rEPQNcj+HG RGOTH23yb8C/yD87wUSPBI/6HgvD9UNWQ8vTAJRL49hsWVlxydPUsVHq7qh0On+e Rugjie1P0taxiZkuHdQ08qNOMw0ZKYig+y8XvrFc34xbJLUy32F2D6xmEEGf7DiS oC0wgWV2UYpr25DU6cn8Iq6BKtao2FjuhsqunLFFmaiEkl9x0/bpBZ8wsU6tLfrd mViCsD5w5oQ+zpG0YT2pyNZST8cQKA+WQN9Cca8Z/2EpJbKR7Mc7hvZcvrNHSs/c Tt9L5CwOJswUgORdiPv4/Oc2ZhADIPRsxXE+rjPa9ffYWS+21QM7y2imRIAuhqKQ RsSk1m+TXhdzkTP6gk25b4dhPDGwT8Um8c5P3ZSpqJX2HIKmxM0K5vrlBd7MtGyu uLD4vRfe3WC5C9mSTFIdPFdz8QaTHXZH3w4DVPdMYGtYjG6DGxg= =gldI -----END PGP SIGNATURE----- Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: Amlogic updates for v5.1 - new board: G12a-based x96 max - G12a: add peripheral clock controller and clock measure support - s400: fix SD/eMMC max rate issues - s400: audio: add sp/dif in support - GX: support simplefb * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson: add g12a x96 max board dt-bindings: arm: amlogic: add amediatech x96-max bindings arm64: dts: meson: g12a: add peripheral clock controller arm64: dts: meson: g12a: add clk measure support arm64: dts: meson: axg: add clk measure support arm64: dts: meson: fix g12a buses arm64: dts: meson-axg: add efuse device arm64: dts: meson: s400: fix emmc maximum rate arm64: dts: meson: s400: enable sdr104 on sdio arm64: dts: meson-gx: add support for simplefb dt-bindings: meson: add specific simplefb bindings arm64: dts: meson-gx: Add canvas provider node to the vpu arm64: dts: meson-axg: s400: add spdifin to the sound card arm64: dts: meson-axg: s400: add spdif-dir codec arm64: dts: meson-axg: add spdifin Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
e7b984912d
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@ -109,6 +109,7 @@ Board compatible values (alphabetically, grouped by SoC):
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- "amlogic,s400" (Meson axg a113d)
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- "amlogic,u200" (Meson g12a s905d2)
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- "amediatech,x96-max" (Meson g12a s905x2)
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Amlogic Meson Firmware registers Interface
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------------------------------------------
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@ -0,0 +1,33 @@
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Meson specific Simple Framebuffer bindings
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This binding documents meson specific extensions to the simple-framebuffer
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bindings. The meson simplefb u-boot code relies on the devicetree containing
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pre-populated simplefb nodes.
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These extensions are intended so that u-boot can select the right node based
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on which pipeline is being used. As such they are solely intended for
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firmware / bootloader use, and the OS should ignore them.
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Required properties:
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- compatible: "amlogic,simple-framebuffer", "simple-framebuffer"
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- amlogic,pipeline, one of:
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"vpu-cvbs"
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"vpu-hdmi"
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Example:
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chosen {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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simplefb_hdmi: framebuffer-hdmi {
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compatible = "amlogic,simple-framebuffer",
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"simple-framebuffer";
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amlogic,pipeline = "vpu-hdmi";
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clocks = <&clkc CLKID_HDMI_PCLK>,
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<&clkc CLKID_CLK81>,
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<&clkc CLKID_GCLK_VENCI_INT0>;
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power-domains = <&pwrc_vpu>;
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};
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};
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@ -24,6 +24,7 @@ amarula Amarula Solutions
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amazon Amazon.com, Inc.
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amcc Applied Micro Circuits Corporation (APM, formally AMCC)
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amd Advanced Micro Devices (AMD), Inc.
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amediatech Shenzhen Amediatech Technology Co., Ltd
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amlogic Amlogic, Inc.
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ampire Ampire Co., Ltd.
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ams AMS AG
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@ -1,6 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb
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@ -95,6 +95,13 @@ dmics: audio-codec-3 {
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sound-name-prefix = "MIC";
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};
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spdif_dir: audio-codec-4 {
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#sound-dai-cells = <0>;
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compatible = "linux,spdif-dir";
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status = "okay";
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sound-name-prefix = "DIR";
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};
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emmc_pwrseq: emmc-pwrseq {
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
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@ -249,6 +256,9 @@ sound {
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"TODDR_A IN 2", "TDMIN_C OUT",
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"TODDR_B IN 2", "TDMIN_C OUT",
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"TODDR_C IN 2", "TDMIN_C OUT",
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"TODDR_A IN 3", "SPDIFIN Capture",
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"TODDR_B IN 3", "SPDIFIN Capture",
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"TODDR_C IN 3", "SPDIFIN Capture",
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"TODDR_A IN 4", "PDM Capture",
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"TODDR_B IN 4", "PDM Capture",
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"TODDR_C IN 4", "PDM Capture",
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@ -326,6 +336,14 @@ codec {
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};
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dai-link-8 {
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sound-dai = <&spdifin>;
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codec {
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sound-dai = <&spdif_dir>;
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};
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};
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dai-link-9 {
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sound-dai = <&pdm>;
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codec {
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@ -446,7 +464,8 @@ &sd_emmc_b {
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bus-width = <4>;
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cap-sd-highspeed;
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max-frequency = <100000000>;
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sd-uhs-sdr104;
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max-frequency = <200000000>;
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non-removable;
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disable-wp;
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@ -469,9 +488,8 @@ &sd_emmc_c {
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pinctrl-names = "default", "clk-gate";
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bus-width = <8>;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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max-frequency = <180000000>;
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max-frequency = <200000000>;
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non-removable;
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disable-wp;
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mmc-ddr-1_8v;
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@ -483,6 +501,12 @@ &sd_emmc_c {
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vqmmc-supply = <&vddio_boot>;
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};
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&spdifin {
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pinctrl-0 = <&spdif_in_a19_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&spdifout {
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pinctrl-0 = <&spdif_out_a20_pins>;
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pinctrl-names = "default";
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@ -111,6 +111,14 @@ sm: secure-monitor {
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compatible = "amlogic,meson-gxbb-sm";
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};
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efuse: efuse {
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compatible = "amlogic,meson-gxbb-efuse";
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clocks = <&clkc CLKID_EFUSE>;
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#address-cells = <1>;
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#size-cells = <1>;
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read-only;
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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@ -1260,6 +1268,18 @@ tdmin_lb: audio-controller@3c0 {
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status = "disabled";
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};
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spdifin: audio-controller@400 {
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compatible = "amlogic,axg-spdifin";
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reg = <0x0 0x400 0x0 0x30>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "SPDIFIN";
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interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
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<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
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clock-names = "pclk", "refclk";
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status = "disabled";
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};
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spdifout: audio-controller@480 {
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compatible = "amlogic,axg-spdifout";
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reg = <0x0 0x480 0x0 0x50>;
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@ -1590,6 +1610,11 @@ spicc1: spi@15000 {
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status = "disabled";
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};
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clk_msr: clock-measure@18000 {
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compatible = "amlogic,meson-axg-clk-measure";
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reg = <0x0 0x18000 0x0 0x10>;
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};
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i2c3: i2c@1c000 {
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compatible = "amlogic,meson-axg-i2c";
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reg = <0x0 0x1c000 0x0 0x20>;
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@ -0,0 +1,28 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2018 BayLibre SAS. All rights reserved.
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*/
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/dts-v1/;
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#include "meson-g12a.dtsi"
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/ {
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compatible = "amediatech,x96-max", "amlogic,u200", "amlogic,g12a";
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model = "Shenzhen Amediatech Technology Co., Ltd X96 Max";
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aliases {
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serial0 = &uart_AO;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x40000000>;
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};
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};
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&uart_AO {
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status = "okay";
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};
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@ -78,20 +78,41 @@ soc {
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#size-cells = <2>;
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ranges;
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periphs: periphs@ff634000 {
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apb: bus@ff600000 {
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compatible = "simple-bus";
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reg = <0x0 0xff634000 0x0 0x2000>;
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reg = <0x0 0xff600000 0x0 0x200000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
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};
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ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
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hiubus: bus@ff63c000 {
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compatible = "simple-bus";
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reg = <0x0 0xff63c000 0x0 0x1c00>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
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periphs: bus@34400 {
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compatible = "simple-bus";
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reg = <0x0 0x34400 0x0 0x400>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
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};
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hiu: bus@3c000 {
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compatible = "simple-bus";
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reg = <0x0 0x3c000 0x0 0x1400>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
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hhi: system-controller@0 {
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compatible = "amlogic,meson-gx-hhi-sysctrl",
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"simple-mfd", "syscon";
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reg = <0 0 0 0x400>;
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clkc: clock-controller {
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compatible = "amlogic,g12a-clkc";
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#clock-cells = <1>;
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clocks = <&xtal>;
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clock-names = "xtal";
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};
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};
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};
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};
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aobus: bus@ff800000 {
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@ -102,7 +123,8 @@ aobus: bus@ff800000 {
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ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
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uart_AO: serial@3000 {
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compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
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compatible = "amlogic,meson-gx-uart",
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"amlogic,meson-ao-uart";
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reg = <0x0 0x3000 0x0 0x18>;
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interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>, <&xtal>, <&xtal>;
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@ -111,7 +133,8 @@ uart_AO: serial@3000 {
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};
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uart_AO_B: serial@4000 {
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compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
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compatible = "amlogic,meson-gx-uart",
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"amlogic,meson-ao-uart";
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reg = <0x0 0x4000 0x0 0x18>;
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interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>, <&xtal>, <&xtal>;
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@ -135,18 +158,15 @@ gic: interrupt-controller@ffc01000 {
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cbus: bus@ffd00000 {
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compatible = "simple-bus";
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reg = <0x0 0xffd00000 0x0 0x25000>;
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reg = <0x0 0xffd00000 0x0 0x100000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
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};
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ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
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apb: apb@ffe00000 {
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compatible = "simple-bus";
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reg = <0x0 0xffe00000 0x0 0x200000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
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clk_msr: clock-measure@18000 {
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compatible = "amlogic,meson-g12a-clk-measure";
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reg = <0x0 0x18000 0x0 0x10>;
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};
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};
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};
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@ -50,6 +50,28 @@ linux,cma {
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};
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};
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chosen {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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simplefb_cvbs: framebuffer-cvbs {
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compatible = "amlogic,simple-framebuffer",
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"simple-framebuffer";
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amlogic,pipeline = "vpu-cvbs";
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power-domains = <&pwrc_vpu>;
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status = "disabled";
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};
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simplefb_hdmi: framebuffer-hdmi {
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compatible = "amlogic,simple-framebuffer",
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"simple-framebuffer";
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amlogic,pipeline = "vpu-hdmi";
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power-domains = <&pwrc_vpu>;
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status = "disabled";
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};
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};
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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@ -510,6 +532,7 @@ vpu: vpu@d0100000 {
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interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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amlogic,canvas = <&canvas>;
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/* CVBS VDAC output port */
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cvbs_vdac_port: port@0 {
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@ -784,6 +784,12 @@ &sd_emmc_c {
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resets = <&reset RESET_SD_EMMC_C>;
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};
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&simplefb_hdmi {
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clocks = <&clkc CLKID_HDMI_PCLK>,
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<&clkc CLKID_CLK81>,
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<&clkc CLKID_GCLK_VENCI_INT0>;
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};
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&spicc {
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clocks = <&clkc CLKID_SPICC>;
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clock-names = "core";
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@ -787,6 +787,12 @@ &sd_emmc_c {
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resets = <&reset RESET_SD_EMMC_C>;
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};
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&simplefb_hdmi {
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clocks = <&clkc CLKID_HDMI_PCLK>,
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<&clkc CLKID_CLK81>,
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<&clkc CLKID_GCLK_VENCI_INT0>;
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};
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&spicc {
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clocks = <&clkc CLKID_SPICC>;
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clock-names = "core";
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||||
|
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