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arm64: dts: exynos: Add DECON_TV node to Exynos5433
DECON_TV is 2nd display controller on Exynos5433, used in HDMI path or 2nd DSI path. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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df5d5a934b
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arch/arm64/boot/dts/exynos
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@ -751,6 +751,29 @@ decon_to_mic: endpoint {
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};
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};
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decon_tv: decon@13880000 {
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compatible = "samsung,exynos5433-decon-tv";
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reg = <0x13880000 0x20b8>;
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clocks = <&cmu_disp CLK_PCLK_DECON_TV>,
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<&cmu_disp CLK_ACLK_DECON_TV>,
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<&cmu_disp CLK_ACLK_SMMU_TV0X>,
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<&cmu_disp CLK_ACLK_XIU_TV0X>,
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<&cmu_disp CLK_PCLK_SMMU_TV0X>,
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<&cmu_disp CLK_SCLK_DECON_TV_VCLK>,
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<&cmu_disp CLK_SCLK_DECON_TV_ECLK>;
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clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
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"aclk_xiu_decon0x", "pclk_smmu_decon0x",
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"sclk_decon_vclk", "sclk_decon_eclk";
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samsung,disp-sysreg = <&syscon_disp>;
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interrupt-names = "fifo", "vsync", "lcd_sys";
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interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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iommus = <&sysmmu_tv0x>, <&sysmmu_tv1x>;
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iommu-names = "m0", "m1";
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};
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dsi: dsi@13900000 {
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compatible = "samsung,exynos5433-mipi-dsi";
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reg = <0x13900000 0xC0>;
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@ -912,6 +935,26 @@ sysmmu_decon1x: sysmmu@13a10000 {
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#iommu-cells = <0>;
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};
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sysmmu_tv0x: sysmmu@13a20000 {
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compatible = "samsung,exynos-sysmmu";
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reg = <0x13a20000 0x1000>;
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interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "pclk", "aclk";
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clocks = <&cmu_disp CLK_PCLK_SMMU_TV0X>,
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<&cmu_disp CLK_ACLK_SMMU_TV0X>;
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#iommu-cells = <0>;
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};
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sysmmu_tv1x: sysmmu@13a30000 {
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compatible = "samsung,exynos-sysmmu";
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reg = <0x13a30000 0x1000>;
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interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "pclk", "aclk";
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clocks = <&cmu_disp CLK_PCLK_SMMU_TV1X>,
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<&cmu_disp CLK_ACLK_SMMU_TV1X>;
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#iommu-cells = <0>;
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};
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sysmmu_gscl0: sysmmu@13c80000 {
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compatible = "samsung,exynos-sysmmu";
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reg = <0x13C80000 0x1000>;
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