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drm/i915: Don't store current shared DPLL in the new pipe_config 

Now that shared DPLLs configuration is staged, there's no need to track
the current ones in the new pipe_config since those are released before
making the new pipe_config effective.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Ander Conselvan de Oliveira 2014-10-29 11:32:38 +02:00 committed by Daniel Vetter
parent f3019a4d92
commit e9f1af3934
1 changed files with 0 additions and 8 deletions
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8
drivers/gpu/drm/i915/intel_display.c
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@ -5533,14 +5533,6 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
if (HAS_IPS(dev))
hsw_compute_ips_config(crtc, pipe_config);
/*
* XXX: PCH/WRPLL clock sharing is done in ->mode_set if ->compute_clock is not
* set, so make sure the old clock survives for now.
*/
if (dev_priv->display.crtc_compute_clock == NULL &&
(HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev) || HAS_DDI(dev)))
pipe_config->shared_dpll = crtc->config.shared_dpll;
if (pipe_config->has_pch_encoder)
return ironlake_fdi_compute_config(crtc, pipe_config);