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ARM: socfpga: dts: Fix gpio dts entry for the correct clock 

The correct clock for the HPS gpio(s) should be the l4_mp_clk.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
This commit is contained in:
Dinh Nguyen 2014-05-28 22:40:13 -05:00
parent c5dab6e2c1
commit e9f9fe35f8
1 changed files with 3 additions and 3 deletions
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6
arch/arm/boot/dts/socfpga.dtsi
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@ -565,7 +565,7 @@ gpio0: gpio@ff708000 {
#size-cells = <0>;
compatible = "snps,dw-apb-gpio";
reg = <0xff708000 0x1000>;
clocks = <&per_base_clk>;
clocks = <&l4_mp_clk>;
status = "disabled";
porta: gpio-controller@0 {
@ -585,7 +585,7 @@ gpio1: gpio@ff709000 {
#size-cells = <0>;
compatible = "snps,dw-apb-gpio";
reg = <0xff709000 0x1000>;
clocks = <&per_base_clk>;
clocks = <&l4_mp_clk>;
status = "disabled";
portb: gpio-controller@0 {
@ -605,7 +605,7 @@ gpio2: gpio@ff70a000 {
#size-cells = <0>;
compatible = "snps,dw-apb-gpio";
reg = <0xff70a000 0x1000>;
clocks = <&per_base_clk>;
clocks = <&l4_mp_clk>;
status = "disabled";
portc: gpio-controller@0 {