mirror of https://gitee.com/openkylin/linux.git
COBALT: remove all references to Cobalt NVRAM
Remove not only the references to Cobalt NVRAM, but the header file as well. Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Acked-by: Tim Hockin <thockin@hockin.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Robert P. J. Day
Linus Torvalds
parent
ef48bd2461
commit
ea5a3dcfda
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@ -42,19 +42,12 @@
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#define PC 1
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#define ATARI 2
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#define COBALT 3
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/* select machine configuration */
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#if defined(CONFIG_ATARI)
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# define MACH ATARI
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#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) /* and others?? */
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#define MACH PC
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# if defined(CONFIG_COBALT)
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# include <linux/cobalt-nvram.h>
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# define MACH COBALT
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# else
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# define MACH PC
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# endif
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# define MACH PC
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#else
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# error Cannot build nvram driver for this machine configuration.
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#endif
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@ -76,18 +69,6 @@
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#endif
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#if MACH == COBALT
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#define CHECK_DRIVER_INIT() 1
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#define NVRAM_BYTES (128-NVRAM_FIRST_BYTE)
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#define mach_check_checksum cobalt_check_checksum
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#define mach_set_checksum cobalt_set_checksum
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#define mach_proc_infos cobalt_proc_infos
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#endif
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#if MACH == ATARI
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/* Special parameters for RTC in Atari machines */
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@ -604,177 +585,6 @@ pc_proc_infos(unsigned char *nvram, char *buffer, int *len,
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#endif /* MACH == PC */
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#if MACH == COBALT
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/* the cobalt CMOS has a wider range of its checksum */
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static int cobalt_check_checksum(void)
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{
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int i;
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unsigned short sum = 0;
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unsigned short expect;
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for (i = COBT_CMOS_CKS_START; i <= COBT_CMOS_CKS_END; ++i) {
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if ((i == COBT_CMOS_CHECKSUM) || (i == (COBT_CMOS_CHECKSUM+1)))
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continue;
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sum += __nvram_read_byte(i);
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}
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expect = __nvram_read_byte(COBT_CMOS_CHECKSUM) << 8 |
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__nvram_read_byte(COBT_CMOS_CHECKSUM+1);
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return ((sum & 0xffff) == expect);
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}
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static void cobalt_set_checksum(void)
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{
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int i;
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unsigned short sum = 0;
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for (i = COBT_CMOS_CKS_START; i <= COBT_CMOS_CKS_END; ++i) {
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if ((i == COBT_CMOS_CHECKSUM) || (i == (COBT_CMOS_CHECKSUM+1)))
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continue;
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sum += __nvram_read_byte(i);
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}
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__nvram_write_byte(sum >> 8, COBT_CMOS_CHECKSUM);
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__nvram_write_byte(sum & 0xff, COBT_CMOS_CHECKSUM+1);
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}
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#ifdef CONFIG_PROC_FS
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static int cobalt_proc_infos(unsigned char *nvram, char *buffer, int *len,
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off_t *begin, off_t offset, int size)
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{
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int i;
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unsigned int checksum;
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unsigned int flags;
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char sernum[14];
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char *key = "cNoEbTaWlOtR!";
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unsigned char bto_csum;
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spin_lock_irq(&rtc_lock);
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checksum = __nvram_check_checksum();
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spin_unlock_irq(&rtc_lock);
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PRINT_PROC("Checksum status: %svalid\n", checksum ? "" : "not ");
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flags = nvram[COBT_CMOS_FLAG_BYTE_0] << 8
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| nvram[COBT_CMOS_FLAG_BYTE_1];
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PRINT_PROC("Console: %s\n",
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flags & COBT_CMOS_CONSOLE_FLAG ? "on": "off");
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PRINT_PROC("Firmware Debug Messages: %s\n",
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flags & COBT_CMOS_DEBUG_FLAG ? "on": "off");
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PRINT_PROC("Auto Prompt: %s\n",
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flags & COBT_CMOS_AUTO_PROMPT_FLAG ? "on": "off");
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PRINT_PROC("Shutdown Status: %s\n",
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flags & COBT_CMOS_CLEAN_BOOT_FLAG ? "clean": "dirty");
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PRINT_PROC("Hardware Probe: %s\n",
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flags & COBT_CMOS_HW_NOPROBE_FLAG ? "partial": "full");
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PRINT_PROC("System Fault: %sdetected\n",
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flags & COBT_CMOS_SYSFAULT_FLAG ? "": "not ");
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PRINT_PROC("Panic on OOPS: %s\n",
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flags & COBT_CMOS_OOPSPANIC_FLAG ? "yes": "no");
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PRINT_PROC("Delayed Cache Initialization: %s\n",
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flags & COBT_CMOS_DELAY_CACHE_FLAG ? "yes": "no");
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PRINT_PROC("Show Logo at Boot: %s\n",
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flags & COBT_CMOS_NOLOGO_FLAG ? "no": "yes");
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PRINT_PROC("Boot Method: ");
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switch (nvram[COBT_CMOS_BOOT_METHOD]) {
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case COBT_CMOS_BOOT_METHOD_DISK:
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PRINT_PROC("disk\n");
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break;
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case COBT_CMOS_BOOT_METHOD_ROM:
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PRINT_PROC("rom\n");
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break;
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case COBT_CMOS_BOOT_METHOD_NET:
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PRINT_PROC("net\n");
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break;
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default:
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PRINT_PROC("unknown\n");
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break;
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}
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PRINT_PROC("Primary Boot Device: %d:%d\n",
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nvram[COBT_CMOS_BOOT_DEV0_MAJ],
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nvram[COBT_CMOS_BOOT_DEV0_MIN] );
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PRINT_PROC("Secondary Boot Device: %d:%d\n",
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nvram[COBT_CMOS_BOOT_DEV1_MAJ],
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nvram[COBT_CMOS_BOOT_DEV1_MIN] );
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PRINT_PROC("Tertiary Boot Device: %d:%d\n",
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nvram[COBT_CMOS_BOOT_DEV2_MAJ],
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nvram[COBT_CMOS_BOOT_DEV2_MIN] );
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PRINT_PROC("Uptime: %d\n",
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nvram[COBT_CMOS_UPTIME_0] << 24 |
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nvram[COBT_CMOS_UPTIME_1] << 16 |
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nvram[COBT_CMOS_UPTIME_2] << 8 |
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nvram[COBT_CMOS_UPTIME_3]);
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PRINT_PROC("Boot Count: %d\n",
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nvram[COBT_CMOS_BOOTCOUNT_0] << 24 |
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nvram[COBT_CMOS_BOOTCOUNT_1] << 16 |
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nvram[COBT_CMOS_BOOTCOUNT_2] << 8 |
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nvram[COBT_CMOS_BOOTCOUNT_3]);
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/* 13 bytes of serial num */
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for (i=0 ; i<13 ; i++) {
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sernum[i] = nvram[COBT_CMOS_SYS_SERNUM_0 + i];
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}
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sernum[13] = '\0';
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checksum = 0;
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for (i=0 ; i<13 ; i++) {
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checksum += sernum[i] ^ key[i];
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}
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checksum = ((checksum & 0x7f) ^ (0xd6)) & 0xff;
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PRINT_PROC("Serial Number: %s", sernum);
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if (checksum != nvram[COBT_CMOS_SYS_SERNUM_CSUM]) {
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PRINT_PROC(" (invalid checksum)");
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}
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PRINT_PROC("\n");
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PRINT_PROC("Rom Revison: %d.%d.%d\n", nvram[COBT_CMOS_ROM_REV_MAJ],
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nvram[COBT_CMOS_ROM_REV_MIN], nvram[COBT_CMOS_ROM_REV_REV]);
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PRINT_PROC("BTO Server: %d.%d.%d.%d", nvram[COBT_CMOS_BTO_IP_0],
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nvram[COBT_CMOS_BTO_IP_1], nvram[COBT_CMOS_BTO_IP_2],
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nvram[COBT_CMOS_BTO_IP_3]);
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bto_csum = nvram[COBT_CMOS_BTO_IP_0] + nvram[COBT_CMOS_BTO_IP_1]
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+ nvram[COBT_CMOS_BTO_IP_2] + nvram[COBT_CMOS_BTO_IP_3];
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if (bto_csum != nvram[COBT_CMOS_BTO_IP_CSUM]) {
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PRINT_PROC(" (invalid checksum)");
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}
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PRINT_PROC("\n");
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if (flags & COBT_CMOS_VERSION_FLAG
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&& nvram[COBT_CMOS_VERSION] >= COBT_CMOS_VER_BTOCODE) {
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PRINT_PROC("BTO Code: 0x%x\n",
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nvram[COBT_CMOS_BTO_CODE_0] << 24 |
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nvram[COBT_CMOS_BTO_CODE_1] << 16 |
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nvram[COBT_CMOS_BTO_CODE_2] << 8 |
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nvram[COBT_CMOS_BTO_CODE_3]);
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}
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return 1;
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}
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#endif /* CONFIG_PROC_FS */
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#endif /* MACH == COBALT */
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#if MACH == ATARI
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static int
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@ -1,109 +0,0 @@
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/*
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* $Id: cobalt-nvram.h,v 1.20 2001/10/17 23:16:55 thockin Exp $
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* cobalt-nvram.h : defines for the various fields in the cobalt NVRAM
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*
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* Copyright 2001,2002 Sun Microsystems, Inc.
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*/
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#ifndef COBALT_NVRAM_H
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#define COBALT_NVRAM_H
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#include <linux/nvram.h>
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#define COBT_CMOS_INFO_MAX 0x7f /* top address allowed */
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#define COBT_CMOS_BIOS_DRIVE_INFO 0x12 /* drive info would go here */
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#define COBT_CMOS_CKS_START NVRAM_OFFSET(0x0e)
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#define COBT_CMOS_CKS_END NVRAM_OFFSET(0x7f)
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/* flag bytes - 16 flags for now, leave room for more */
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#define COBT_CMOS_FLAG_BYTE_0 NVRAM_OFFSET(0x10)
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#define COBT_CMOS_FLAG_BYTE_1 NVRAM_OFFSET(0x11)
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/* flags in flag bytes - up to 16 */
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#define COBT_CMOS_FLAG_MIN 0x0001
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#define COBT_CMOS_CONSOLE_FLAG 0x0001 /* console on/off */
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#define COBT_CMOS_DEBUG_FLAG 0x0002 /* ROM debug messages */
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#define COBT_CMOS_AUTO_PROMPT_FLAG 0x0004 /* boot to ROM prompt? */
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#define COBT_CMOS_CLEAN_BOOT_FLAG 0x0008 /* set by a clean shutdown */
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#define COBT_CMOS_HW_NOPROBE_FLAG 0x0010 /* go easy on the probing */
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#define COBT_CMOS_SYSFAULT_FLAG 0x0020 /* system fault detected */
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#define COBT_CMOS_OOPSPANIC_FLAG 0x0040 /* panic on oops */
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#define COBT_CMOS_DELAY_CACHE_FLAG 0x0080 /* delay cache initialization */
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#define COBT_CMOS_NOLOGO_FLAG 0x0100 /* hide "C" logo @ boot */
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#define COBT_CMOS_VERSION_FLAG 0x0200 /* the version field is valid */
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#define COBT_CMOS_FLAG_MAX 0x0200
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/* leave byte 0x12 blank - Linux looks for drive info here */
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/* CMOS structure version, valid if COBT_CMOS_VERSION_FLAG is true */
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#define COBT_CMOS_VERSION NVRAM_OFFSET(0x13)
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#define COBT_CMOS_VER_BTOCODE 1 /* min. version needed for btocode */
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/* index of default boot method */
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#define COBT_CMOS_BOOT_METHOD NVRAM_OFFSET(0x20)
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#define COBT_CMOS_BOOT_METHOD_DISK 0
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#define COBT_CMOS_BOOT_METHOD_ROM 1
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#define COBT_CMOS_BOOT_METHOD_NET 2
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#define COBT_CMOS_BOOT_DEV_MIN NVRAM_OFFSET(0x21)
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/* major #, minor # of first through fourth boot device */
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#define COBT_CMOS_BOOT_DEV0_MAJ NVRAM_OFFSET(0x21)
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#define COBT_CMOS_BOOT_DEV0_MIN NVRAM_OFFSET(0x22)
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#define COBT_CMOS_BOOT_DEV1_MAJ NVRAM_OFFSET(0x23)
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#define COBT_CMOS_BOOT_DEV1_MIN NVRAM_OFFSET(0x24)
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#define COBT_CMOS_BOOT_DEV2_MAJ NVRAM_OFFSET(0x25)
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#define COBT_CMOS_BOOT_DEV2_MIN NVRAM_OFFSET(0x26)
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#define COBT_CMOS_BOOT_DEV3_MAJ NVRAM_OFFSET(0x27)
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#define COBT_CMOS_BOOT_DEV3_MIN NVRAM_OFFSET(0x28)
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#define COBT_CMOS_BOOT_DEV_MAX NVRAM_OFFSET(0x28)
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/* checksum of bytes 0xe-0x7f */
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#define COBT_CMOS_CHECKSUM NVRAM_OFFSET(0x2e)
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/* running uptime counter, units of 5 minutes (32 bits =~ 41000 years) */
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#define COBT_CMOS_UPTIME_0 NVRAM_OFFSET(0x30)
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#define COBT_CMOS_UPTIME_1 NVRAM_OFFSET(0x31)
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#define COBT_CMOS_UPTIME_2 NVRAM_OFFSET(0x32)
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#define COBT_CMOS_UPTIME_3 NVRAM_OFFSET(0x33)
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/* count of successful boots (32 bits) */
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#define COBT_CMOS_BOOTCOUNT_0 NVRAM_OFFSET(0x38)
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#define COBT_CMOS_BOOTCOUNT_1 NVRAM_OFFSET(0x39)
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#define COBT_CMOS_BOOTCOUNT_2 NVRAM_OFFSET(0x3a)
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#define COBT_CMOS_BOOTCOUNT_3 NVRAM_OFFSET(0x3b)
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/* 13 bytes: system serial number, same as on the back of the system */
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#define COBT_CMOS_SYS_SERNUM_LEN 13
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#define COBT_CMOS_SYS_SERNUM_0 NVRAM_OFFSET(0x40)
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#define COBT_CMOS_SYS_SERNUM_1 NVRAM_OFFSET(0x41)
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#define COBT_CMOS_SYS_SERNUM_2 NVRAM_OFFSET(0x42)
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#define COBT_CMOS_SYS_SERNUM_3 NVRAM_OFFSET(0x43)
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#define COBT_CMOS_SYS_SERNUM_4 NVRAM_OFFSET(0x44)
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#define COBT_CMOS_SYS_SERNUM_5 NVRAM_OFFSET(0x45)
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#define COBT_CMOS_SYS_SERNUM_6 NVRAM_OFFSET(0x46)
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#define COBT_CMOS_SYS_SERNUM_7 NVRAM_OFFSET(0x47)
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#define COBT_CMOS_SYS_SERNUM_8 NVRAM_OFFSET(0x48)
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#define COBT_CMOS_SYS_SERNUM_9 NVRAM_OFFSET(0x49)
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#define COBT_CMOS_SYS_SERNUM_10 NVRAM_OFFSET(0x4a)
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#define COBT_CMOS_SYS_SERNUM_11 NVRAM_OFFSET(0x4b)
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#define COBT_CMOS_SYS_SERNUM_12 NVRAM_OFFSET(0x4c)
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/* checksum for serial num - 1 byte */
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#define COBT_CMOS_SYS_SERNUM_CSUM NVRAM_OFFSET(0x4f)
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#define COBT_CMOS_ROM_REV_MAJ NVRAM_OFFSET(0x50)
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#define COBT_CMOS_ROM_REV_MIN NVRAM_OFFSET(0x51)
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#define COBT_CMOS_ROM_REV_REV NVRAM_OFFSET(0x52)
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#define COBT_CMOS_BTO_CODE_0 NVRAM_OFFSET(0x53)
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#define COBT_CMOS_BTO_CODE_1 NVRAM_OFFSET(0x54)
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#define COBT_CMOS_BTO_CODE_2 NVRAM_OFFSET(0x55)
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#define COBT_CMOS_BTO_CODE_3 NVRAM_OFFSET(0x56)
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#define COBT_CMOS_BTO_IP_CSUM NVRAM_OFFSET(0x57)
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#define COBT_CMOS_BTO_IP_0 NVRAM_OFFSET(0x58)
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#define COBT_CMOS_BTO_IP_1 NVRAM_OFFSET(0x59)
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#define COBT_CMOS_BTO_IP_2 NVRAM_OFFSET(0x5a)
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#define COBT_CMOS_BTO_IP_3 NVRAM_OFFSET(0x5b)
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#endif /* COBALT_NVRAM_H */
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