mirror of https://gitee.com/openkylin/linux.git
drm/nouveau/kms/nv50: separate out cursor surface commit
This commit separates the calculation of EVO state from the commit, in order to make the same code useful for atomic modesetting. The legacy interfaces have been wrapped on top of them. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs
parent
a7ae156190
commit
ea8ee39002
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@ -54,7 +54,6 @@ struct nouveau_crtc {
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struct {
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struct nouveau_bo *nvbo;
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bool visible;
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uint32_t offset;
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void (*set_offset)(struct nouveau_crtc *, uint32_t offset);
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void (*set_pos)(struct nouveau_crtc *, int x, int y);
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@ -111,6 +111,14 @@ struct nv50_head_atom {
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u16 h;
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} core;
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struct {
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bool visible;
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u32 handle;
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u64 offset:40;
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u8 layout:1;
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u8 format:1;
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} curs;
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struct {
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u8 depth;
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u8 cpp;
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@ -123,6 +131,7 @@ struct nv50_head_atom {
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union {
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struct {
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bool core:1;
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bool curs:1;
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};
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u8 mask;
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} clr;
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@ -130,6 +139,7 @@ struct nv50_head_atom {
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union {
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struct {
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bool core:1;
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bool curs:1;
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bool view:1;
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bool mode:1;
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};
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@ -775,6 +785,62 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
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/******************************************************************************
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* Head
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*****************************************************************************/
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static void
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nv50_head_curs_clr(struct nv50_head *head)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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u32 *push;
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if ((push = evo_wait(core, 4))) {
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if (core->base.user.oclass < G82_DISP_CORE_CHANNEL_DMA) {
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evo_mthd(push, 0x0880 + head->base.index * 0x400, 1);
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evo_data(push, 0x05000000);
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} else
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if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA) {
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evo_mthd(push, 0x0880 + head->base.index * 0x400, 1);
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evo_data(push, 0x05000000);
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evo_mthd(push, 0x089c + head->base.index * 0x400, 1);
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evo_data(push, 0x00000000);
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} else {
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evo_mthd(push, 0x0480 + head->base.index * 0x300, 1);
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evo_data(push, 0x05000000);
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evo_mthd(push, 0x048c + head->base.index * 0x300, 1);
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evo_data(push, 0x00000000);
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}
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evo_kick(push, core);
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}
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}
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static void
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nv50_head_curs_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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u32 *push;
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if ((push = evo_wait(core, 5))) {
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if (core->base.user.oclass < G82_DISP_BASE_CHANNEL_DMA) {
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evo_mthd(push, 0x0880 + head->base.index * 0x400, 2);
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evo_data(push, 0x80000000 | (asyh->curs.layout << 26) |
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(asyh->curs.format << 24));
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evo_data(push, asyh->curs.offset >> 8);
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} else
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if (core->base.user.oclass < GF110_DISP_BASE_CHANNEL_DMA) {
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evo_mthd(push, 0x0880 + head->base.index * 0x400, 2);
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evo_data(push, 0x80000000 | (asyh->curs.layout << 26) |
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(asyh->curs.format << 24));
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evo_data(push, asyh->curs.offset >> 8);
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evo_mthd(push, 0x089c + head->base.index * 0x400, 1);
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evo_data(push, asyh->curs.handle);
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} else {
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evo_mthd(push, 0x0480 + head->base.index * 0x300, 2);
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evo_data(push, 0x80000000 | (asyh->curs.layout << 26) |
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(asyh->curs.format << 24));
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evo_data(push, asyh->curs.offset >> 8);
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evo_mthd(push, 0x048c + head->base.index * 0x300, 1);
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evo_data(push, asyh->curs.handle);
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}
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evo_kick(push, core);
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}
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}
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static void
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nv50_head_core_clr(struct nv50_head *head)
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{
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@ -941,6 +1007,8 @@ nv50_head_flush_clr(struct nv50_head *head, struct nv50_head_atom *asyh, bool y)
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nv50_head_lut_clr(head);
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if (asyh->clr.core && (!asyh->set.core || y))
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nv50_head_core_clr(head);
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if (asyh->clr.curs && (!asyh->set.curs || y))
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nv50_head_curs_clr(head);
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}
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static void
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@ -949,6 +1017,7 @@ nv50_head_flush_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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if (asyh->set.mode ) nv50_head_mode (head, asyh);
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if (asyh->set.core ) nv50_head_lut_set (head, asyh);
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if (asyh->set.core ) nv50_head_core_set(head, asyh);
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if (asyh->set.curs ) nv50_head_curs_set(head, asyh);
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}
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static void
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@ -1017,7 +1086,7 @@ nv50_head_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state)
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asyh->core.w = asyh->base.w;
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asyh->core.h = asyh->base.h;
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} else
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if ((asyh->core.visible = true)) {
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if ((asyh->core.visible = asyh->curs.visible)) {
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/*XXX: We need to either find some way of having the
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* primary base layer appear black, while still
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* being able to display the other layers, or we
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@ -1039,6 +1108,7 @@ nv50_head_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state)
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asyh->lut.offset = head->base.lut.nvbo->bo.offset;
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} else {
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asyh->core.visible = false;
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asyh->curs.visible = false;
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}
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if (!drm_atomic_crtc_needs_modeset(&asyh->state)) {
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@ -1049,9 +1119,19 @@ nv50_head_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state)
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if (armh->core.visible) {
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asyh->clr.core = true;
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}
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if (asyh->curs.visible) {
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if (memcmp(&armh->curs, &asyh->curs, sizeof(asyh->curs)))
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asyh->set.curs = true;
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} else
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if (armh->curs.visible) {
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asyh->clr.curs = true;
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}
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} else {
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asyh->clr.core = armh->core.visible;
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asyh->clr.curs = armh->curs.visible;
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asyh->set.core = asyh->core.visible;
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asyh->set.curs = asyh->curs.visible;
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}
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memcpy(armh, asyh, sizeof(*asyh));
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@ -1304,55 +1384,27 @@ static void
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nv50_crtc_cursor_show(struct nouveau_crtc *nv_crtc)
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{
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struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev);
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u32 *push = evo_wait(mast, 16);
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if (push) {
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if (nv50_vers(mast) < G82_DISP_CORE_CHANNEL_DMA) {
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evo_mthd(push, 0x0880 + (nv_crtc->index * 0x400), 2);
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evo_data(push, 0x85000000);
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evo_data(push, nv_crtc->cursor.nvbo->bo.offset >> 8);
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} else
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if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) {
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evo_mthd(push, 0x0880 + (nv_crtc->index * 0x400), 2);
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evo_data(push, 0x85000000);
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evo_data(push, nv_crtc->cursor.nvbo->bo.offset >> 8);
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evo_mthd(push, 0x089c + (nv_crtc->index * 0x400), 1);
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evo_data(push, mast->base.vram.handle);
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} else {
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evo_mthd(push, 0x0480 + (nv_crtc->index * 0x300), 2);
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evo_data(push, 0x85000000);
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evo_data(push, nv_crtc->cursor.nvbo->bo.offset >> 8);
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evo_mthd(push, 0x048c + (nv_crtc->index * 0x300), 1);
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evo_data(push, mast->base.vram.handle);
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}
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evo_kick(push, mast);
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}
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nv_crtc->cursor.visible = true;
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struct nv50_head *head = nv50_head(&nv_crtc->base);
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struct nv50_head_atom *asyh = &head->asy;
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asyh->curs.visible = true;
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asyh->curs.handle = mast->base.vram.handle;
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asyh->curs.offset = nv_crtc->cursor.nvbo->bo.offset;
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asyh->curs.layout = 1;
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asyh->curs.format = 1;
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nv50_head_atomic_check(&head->base.base, &asyh->state);
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nv50_head_flush_set(head, asyh);
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}
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static void
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nv50_crtc_cursor_hide(struct nouveau_crtc *nv_crtc)
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{
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struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev);
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u32 *push = evo_wait(mast, 16);
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if (push) {
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if (nv50_vers(mast) < G82_DISP_CORE_CHANNEL_DMA) {
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evo_mthd(push, 0x0880 + (nv_crtc->index * 0x400), 1);
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evo_data(push, 0x05000000);
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} else
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if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) {
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evo_mthd(push, 0x0880 + (nv_crtc->index * 0x400), 1);
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evo_data(push, 0x05000000);
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evo_mthd(push, 0x089c + (nv_crtc->index * 0x400), 1);
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evo_data(push, 0x00000000);
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} else {
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evo_mthd(push, 0x0480 + (nv_crtc->index * 0x300), 1);
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evo_data(push, 0x05000000);
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evo_mthd(push, 0x048c + (nv_crtc->index * 0x300), 1);
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evo_data(push, 0x00000000);
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}
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evo_kick(push, mast);
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}
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nv_crtc->cursor.visible = false;
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struct nv50_head *head = nv50_head(&nv_crtc->base);
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struct nv50_head_atom *asyh = &head->asy;
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asyh->curs.visible = false;
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nv50_head_atomic_check(&head->base.base, &asyh->state);
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nv50_head_flush_clr(head, asyh, false);
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}
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static void
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@ -1383,7 +1435,6 @@ nv50_crtc_dpms(struct drm_crtc *crtc, int mode)
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static void
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nv50_crtc_prepare(struct drm_crtc *crtc)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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struct nv50_head *head = nv50_head(crtc);
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struct nv50_head_atom *asyh = &head->asy;
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@ -1392,14 +1443,11 @@ nv50_crtc_prepare(struct drm_crtc *crtc)
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asyh->state.active = false;
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nv50_head_atomic_check(&head->base.base, &asyh->state);
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nv50_head_flush_clr(head, asyh, false);
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nv50_crtc_cursor_show_hide(nv_crtc, false, false);
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}
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static void
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nv50_crtc_commit(struct drm_crtc *crtc)
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{
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struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
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struct nv50_head *head = nv50_head(crtc);
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struct nv50_head_atom *asyh = &head->asy;
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@ -1407,7 +1455,6 @@ nv50_crtc_commit(struct drm_crtc *crtc)
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nv50_head_atomic_check(&head->base.base, &asyh->state);
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nv50_head_flush_set(head, asyh);
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nv50_crtc_cursor_show_hide(nv_crtc, true, true);
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nv50_display_flip_next(crtc, crtc->primary->fb, NULL, 1);
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}
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