mirror of https://gitee.com/openkylin/linux.git
powerpc: Enable OPTPROBES on PPC32
For that, create a 32 bits version of patch_imm64_load_insns() and create a patch_imm_load_insns() which calls patch_imm32_load_insns() on PPC32 and patch_imm64_load_insns() on PPC64. Adapt optprobes_head.S for PPC32. Use PPC_LL/PPC_STL macros instead of raw ld/std, opt out things linked to paca and use stmw/lmw to save/restore registers. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/bad58c66859b2a475c0ad516b53164ae3b4853cd.1618927318.git.christophe.leroy@csgroup.eu
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eacf4c0202
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@ -229,7 +229,7 @@ config PPC
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select HAVE_MOD_ARCH_SPECIFIC
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select HAVE_NMI if PERF_EVENTS || (PPC64 && PPC_BOOK3S)
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select HAVE_HARDLOCKUP_DETECTOR_ARCH if PPC64 && PPC_BOOK3S && SMP
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select HAVE_OPTPROBES if PPC64
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select HAVE_OPTPROBES
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select HAVE_PERF_EVENTS
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select HAVE_PERF_EVENTS_NMI if PPC64
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select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI && !HAVE_HARDLOCKUP_DETECTOR_ARCH
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@ -141,11 +141,21 @@ void arch_remove_optimized_kprobe(struct optimized_kprobe *op)
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}
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}
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static void patch_imm32_load_insns(unsigned long val, int reg, kprobe_opcode_t *addr)
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{
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patch_instruction((struct ppc_inst *)addr,
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ppc_inst(PPC_RAW_LIS(reg, IMM_H(val))));
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addr++;
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patch_instruction((struct ppc_inst *)addr,
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ppc_inst(PPC_RAW_ORI(reg, reg, IMM_L(val))));
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}
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/*
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* Generate instructions to load provided immediate 64-bit value
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* to register 'reg' and patch these instructions at 'addr'.
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*/
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static void patch_imm64_load_insns(unsigned long val, int reg, kprobe_opcode_t *addr)
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static void patch_imm64_load_insns(unsigned long long val, int reg, kprobe_opcode_t *addr)
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{
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/* lis reg,(op)@highest */
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patch_instruction((struct ppc_inst *)addr,
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@ -177,6 +187,14 @@ static void patch_imm64_load_insns(unsigned long val, int reg, kprobe_opcode_t *
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___PPC_RS(reg) | (val & 0xffff)));
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}
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static void patch_imm_load_insns(unsigned long val, int reg, kprobe_opcode_t *addr)
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{
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if (IS_ENABLED(CONFIG_PPC64))
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patch_imm64_load_insns(val, reg, addr);
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else
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patch_imm32_load_insns(val, reg, addr);
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}
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int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *p)
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{
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struct ppc_inst branch_op_callback, branch_emulate_step, temp;
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@ -230,7 +248,7 @@ int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *p)
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* Fixup the template with instructions to:
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* 1. load the address of the actual probepoint
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*/
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patch_imm64_load_insns((unsigned long)op, 3, buff + TMPL_OP_IDX);
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patch_imm_load_insns((unsigned long)op, 3, buff + TMPL_OP_IDX);
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/*
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* 2. branch to optimized_callback() and emulate_step()
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@ -264,7 +282,7 @@ int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *p)
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* 3. load instruction to be emulated into relevant register, and
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*/
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temp = ppc_inst_read((struct ppc_inst *)p->ainsn.insn);
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patch_imm64_load_insns(ppc_inst_as_ulong(temp), 4, buff + TMPL_INSN_IDX);
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patch_imm_load_insns(ppc_inst_as_ulong(temp), 4, buff + TMPL_INSN_IDX);
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/*
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* 4. branch back from trampoline
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@ -9,6 +9,16 @@
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#include <asm/ptrace.h>
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#include <asm/asm-offsets.h>
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#ifdef CONFIG_PPC64
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#define SAVE_30GPRS(base) SAVE_10GPRS(2,base); SAVE_10GPRS(12,base); SAVE_10GPRS(22,base)
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#define REST_30GPRS(base) REST_10GPRS(2,base); REST_10GPRS(12,base); REST_10GPRS(22,base)
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#define TEMPLATE_FOR_IMM_LOAD_INSNS nop; nop; nop; nop; nop
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#else
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#define SAVE_30GPRS(base) stmw r2, GPR2(base)
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#define REST_30GPRS(base) lmw r2, GPR2(base)
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#define TEMPLATE_FOR_IMM_LOAD_INSNS nop; nop; nop
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#endif
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#define OPT_SLOT_SIZE 65536
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.balign 4
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@ -30,39 +40,41 @@ optinsn_slot:
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.global optprobe_template_entry
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optprobe_template_entry:
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/* Create an in-memory pt_regs */
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stdu r1,-INT_FRAME_SIZE(r1)
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PPC_STLU r1,-INT_FRAME_SIZE(r1)
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SAVE_GPR(0,r1)
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/* Save the previous SP into stack */
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addi r0,r1,INT_FRAME_SIZE
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std r0,GPR1(r1)
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SAVE_10GPRS(2,r1)
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SAVE_10GPRS(12,r1)
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SAVE_10GPRS(22,r1)
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PPC_STL r0,GPR1(r1)
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SAVE_30GPRS(r1)
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/* Save SPRS */
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mfmsr r5
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std r5,_MSR(r1)
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PPC_STL r5,_MSR(r1)
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li r5,0x700
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std r5,_TRAP(r1)
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PPC_STL r5,_TRAP(r1)
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li r5,0
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std r5,ORIG_GPR3(r1)
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std r5,RESULT(r1)
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PPC_STL r5,ORIG_GPR3(r1)
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PPC_STL r5,RESULT(r1)
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mfctr r5
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std r5,_CTR(r1)
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PPC_STL r5,_CTR(r1)
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mflr r5
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std r5,_LINK(r1)
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PPC_STL r5,_LINK(r1)
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mfspr r5,SPRN_XER
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std r5,_XER(r1)
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PPC_STL r5,_XER(r1)
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mfcr r5
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std r5,_CCR(r1)
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PPC_STL r5,_CCR(r1)
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#ifdef CONFIG_PPC64
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lbz r5,PACAIRQSOFTMASK(r13)
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std r5,SOFTE(r1)
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#endif
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/*
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* We may get here from a module, so load the kernel TOC in r2.
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* The original TOC gets restored when pt_regs is restored
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* further below.
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*/
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#ifdef CONFIG_PPC64
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ld r2,PACATOC(r13)
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#endif
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.global optprobe_template_op_address
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optprobe_template_op_address:
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@ -70,11 +82,8 @@ optprobe_template_op_address:
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* Parameters to optimized_callback():
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* 1. optimized_kprobe structure in r3
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*/
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nop
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nop
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nop
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nop
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nop
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TEMPLATE_FOR_IMM_LOAD_INSNS
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/* 2. pt_regs pointer in r4 */
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addi r4,r1,STACK_FRAME_OVERHEAD
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@ -92,11 +101,7 @@ optprobe_template_call_handler:
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.global optprobe_template_insn
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optprobe_template_insn:
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/* 2, Pass instruction to be emulated in r4 */
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nop
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nop
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nop
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nop
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nop
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TEMPLATE_FOR_IMM_LOAD_INSNS
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.global optprobe_template_call_emulate
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optprobe_template_call_emulate:
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@ -107,20 +112,18 @@ optprobe_template_call_emulate:
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* All done.
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* Now, restore the registers...
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*/
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ld r5,_MSR(r1)
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PPC_LL r5,_MSR(r1)
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mtmsr r5
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ld r5,_CTR(r1)
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PPC_LL r5,_CTR(r1)
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mtctr r5
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ld r5,_LINK(r1)
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PPC_LL r5,_LINK(r1)
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mtlr r5
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ld r5,_XER(r1)
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PPC_LL r5,_XER(r1)
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mtxer r5
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ld r5,_CCR(r1)
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PPC_LL r5,_CCR(r1)
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mtcr r5
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REST_GPR(0,r1)
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REST_10GPRS(2,r1)
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REST_10GPRS(12,r1)
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REST_10GPRS(22,r1)
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REST_30GPRS(r1)
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/* Restore the previous SP */
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addi r1,r1,INT_FRAME_SIZE
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