mirror of https://gitee.com/openkylin/linux.git
staging: rtl8192u: fix spaces around for and while in r819xU_phy.c
This patch fixes whitespace around 'for' and 'while' following the linux kernel coding style conventions. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -483,7 +483,7 @@ void rtl8192_phy_configmac(struct net_device *dev)
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dwArrayLen = MACPHY_ArrayLength;
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pdwArray = rtl819XMACPHY_Array;
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}
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for(i = 0; i<dwArrayLen; i=i+3) {
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for (i = 0; i<dwArrayLen; i=i+3) {
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if (pdwArray[i] == 0x318) {
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pdwArray[i+2] = 0x00000800;
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//DbgPrint("ptrArray[i], ptrArray[i+1], ptrArray[i+2] = %x, %x, %x\n",
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@ -672,7 +672,7 @@ u8 rtl8192_phy_checkBBAndRF(struct net_device *dev, HW90_BLOCK_E CheckBlock, RF9
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WriteAddr[HW90_BLOCK_PHY1] = 0x800;
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WriteAddr[HW90_BLOCK_RF] = 0x3;
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RT_TRACE(COMP_PHY, "=======>%s(), CheckBlock:%d\n", __FUNCTION__, CheckBlock);
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for(i=0 ; i < CheckTimes ; i++) {
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for (i=0 ; i < CheckTimes ; i++) {
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//
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// Write Data to register and readback
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@ -744,7 +744,7 @@ void rtl8192_BB_Config_ParaFile(struct net_device *dev)
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/*----Ckeck FPGAPHY0 and PHY1 board is OK----*/
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// TODO: this function should be removed on ASIC , Emily 2007.2.2
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for(eCheckItem=(HW90_BLOCK_E)HW90_BLOCK_PHY0; eCheckItem<=HW90_BLOCK_PHY1; eCheckItem++) {
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for (eCheckItem=(HW90_BLOCK_E)HW90_BLOCK_PHY0; eCheckItem<=HW90_BLOCK_PHY1; eCheckItem++) {
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rtStatus = rtl8192_phy_checkBBAndRF(dev, (HW90_BLOCK_E)eCheckItem, (RF90_RADIO_PATH_E)0); //don't care RF path
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if (rtStatus != 0) {
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RT_TRACE((COMP_ERR | COMP_PHY), "PHY_RF8256_Config():Check PHY%d Fail!!\n", eCheckItem-1);
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@ -914,7 +914,7 @@ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev, RF90_RADIO_PATH_E
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switch (eRFPath) {
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case RF90_PATH_A:
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for(i = 0;i<RadioA_ArrayLength; i=i+2) {
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for (i = 0;i<RadioA_ArrayLength; i=i+2) {
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if (rtl819XRadioA_Array[i] == 0xfe) {
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mdelay(100);
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@ -926,7 +926,7 @@ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev, RF90_RADIO_PATH_E
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}
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break;
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case RF90_PATH_B:
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for(i = 0;i<RadioB_ArrayLength; i=i+2) {
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for (i = 0;i<RadioB_ArrayLength; i=i+2) {
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if (rtl819XRadioB_Array[i] == 0xfe) {
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mdelay(100);
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@ -938,7 +938,7 @@ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev, RF90_RADIO_PATH_E
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}
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break;
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case RF90_PATH_C:
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for(i = 0;i<RadioC_ArrayLength; i=i+2) {
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for (i = 0;i<RadioC_ArrayLength; i=i+2) {
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if (rtl819XRadioC_Array[i] == 0xfe) {
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mdelay(100);
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@ -950,7 +950,7 @@ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev, RF90_RADIO_PATH_E
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}
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break;
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case RF90_PATH_D:
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for(i = 0;i<RadioD_ArrayLength; i=i+2) {
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for (i = 0;i<RadioD_ArrayLength; i=i+2) {
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if (rtl819XRadioD_Array[i] == 0xfe) {
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mdelay(100);
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@ -1295,7 +1295,7 @@ u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8 *stage, u
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write_nic_byte(dev, CurrentCmd->Para1, (u8)CurrentCmd->Para2);
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break;
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case CmdID_RF_WriteReg:
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for(eRFPath = 0; eRFPath < RF90_PATH_MAX; eRFPath++) {
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for (eRFPath = 0; eRFPath < RF90_PATH_MAX; eRFPath++) {
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rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bZebra1_ChannelNum, CurrentCmd->Para2);
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}
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break;
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@ -1304,7 +1304,7 @@ u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8 *stage, u
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}
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break;
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} while(true);
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} while (true);
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// }/*for(Number of RF paths)*/
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(*delay)=CurrentCmd->msDelay;
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@ -1325,7 +1325,7 @@ void rtl8192_phy_FinishSwChnlNow(struct net_device *dev, u8 channel)
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struct r8192_priv *priv = ieee80211_priv(dev);
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u32 delay = 0;
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while(!rtl8192_phy_SwChnlStepByStep(dev,channel,&priv->SwChnlStage,&priv->SwChnlStep,&delay)) {
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while (!rtl8192_phy_SwChnlStepByStep(dev,channel,&priv->SwChnlStage,&priv->SwChnlStep,&delay)) {
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// if(delay>0)
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// msleep(delay);//or mdelay? need further consideration
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if (!priv->up)
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