mirror of https://gitee.com/openkylin/linux.git
habanalabs: reset device upon fw read failure
failure in reading pre-boot verion is not handled correctly, upon failure we need to reset the device in order to be able to reinstall the driver. Signed-off-by: farah kassabri <fkassabri@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
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@ -607,7 +607,9 @@ int hl_fw_read_preboot_status(struct hl_device *hdev, u32 cpu_boot_status_reg,
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return -EIO;
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}
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hdev->asic_funcs->read_device_fw_version(hdev, FW_COMP_PREBOOT);
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rc = hdev->asic_funcs->read_device_fw_version(hdev, FW_COMP_PREBOOT);
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if (rc)
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return rc;
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security_status = RREG32(cpu_security_boot_status_reg);
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@ -927,7 +927,7 @@ struct hl_asic_funcs {
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void (*ctx_fini)(struct hl_ctx *ctx);
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int (*get_clk_rate)(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk);
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u32 (*get_queue_id_for_cq)(struct hl_device *hdev, u32 cq_idx);
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void (*read_device_fw_version)(struct hl_device *hdev,
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int (*read_device_fw_version)(struct hl_device *hdev,
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enum hl_fw_component fwc);
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int (*load_firmware_to_device)(struct hl_device *hdev);
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int (*load_boot_fit_to_device)(struct hl_device *hdev);
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@ -390,8 +390,11 @@ int hl_pci_init(struct hl_device *hdev, u32 cpu_boot_status_reg,
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rc = hl_fw_read_preboot_status(hdev, cpu_boot_status_reg,
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cpu_security_boot_status_reg, boot_err0_reg,
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preboot_ver_timeout);
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if (rc)
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if (rc) {
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dev_err(hdev->dev, "Failed to read preboot version\n");
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hdev->asic_funcs->hw_fini(hdev, true);
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goto unmap_pci_bars;
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}
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return 0;
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@ -3603,7 +3603,7 @@ static int gaudi_load_boot_fit_to_device(struct hl_device *hdev)
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return hl_fw_load_fw_to_device(hdev, GAUDI_BOOT_FIT_FILE, dst, 0, 0);
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}
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static void gaudi_read_device_fw_version(struct hl_device *hdev,
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static int gaudi_read_device_fw_version(struct hl_device *hdev,
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enum hl_fw_component fwc)
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{
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const char *name;
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@ -3623,7 +3623,7 @@ static void gaudi_read_device_fw_version(struct hl_device *hdev,
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break;
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default:
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dev_warn(hdev->dev, "Undefined FW component: %d\n", fwc);
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return;
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return -EIO;
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}
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ver_off &= ~((u32)SRAM_BASE_ADDR);
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@ -3635,7 +3635,10 @@ static void gaudi_read_device_fw_version(struct hl_device *hdev,
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dev_err(hdev->dev, "%s version offset (0x%x) is above SRAM\n",
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name, ver_off);
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strcpy(dest, "unavailable");
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return -EIO;
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}
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return 0;
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}
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static int gaudi_init_cpu(struct hl_device *hdev)
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@ -3925,16 +3928,18 @@ static void gaudi_hw_fini(struct hl_device *hdev, bool hard_reset)
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WREG32(mmPSOC_GLOBAL_CONF_BOOT_STRAP_PINS, boot_strap);
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gaudi->hw_cap_initialized &= ~(HW_CAP_CPU | HW_CAP_CPU_Q |
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HW_CAP_HBM | HW_CAP_PCI_DMA |
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HW_CAP_MME | HW_CAP_TPC_MASK |
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HW_CAP_HBM_DMA | HW_CAP_PLL |
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HW_CAP_NIC_MASK | HW_CAP_MMU |
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HW_CAP_SRAM_SCRAMBLER |
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HW_CAP_HBM_SCRAMBLER |
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HW_CAP_CLK_GATE);
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if (gaudi) {
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gaudi->hw_cap_initialized &= ~(HW_CAP_CPU | HW_CAP_CPU_Q |
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HW_CAP_HBM | HW_CAP_PCI_DMA |
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HW_CAP_MME | HW_CAP_TPC_MASK |
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HW_CAP_HBM_DMA | HW_CAP_PLL |
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HW_CAP_NIC_MASK | HW_CAP_MMU |
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HW_CAP_SRAM_SCRAMBLER |
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HW_CAP_HBM_SCRAMBLER |
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HW_CAP_CLK_GATE);
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memset(gaudi->events_stat, 0, sizeof(gaudi->events_stat));
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memset(gaudi->events_stat, 0, sizeof(gaudi->events_stat));
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}
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}
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static int gaudi_suspend(struct hl_device *hdev)
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@ -2341,7 +2341,7 @@ static int goya_load_boot_fit_to_device(struct hl_device *hdev)
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* FW component passes an offset from SRAM_BASE_ADDR in SCRATCHPAD_xx.
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* The version string should be located by that offset.
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*/
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static void goya_read_device_fw_version(struct hl_device *hdev,
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static int goya_read_device_fw_version(struct hl_device *hdev,
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enum hl_fw_component fwc)
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{
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const char *name;
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@ -2361,7 +2361,7 @@ static void goya_read_device_fw_version(struct hl_device *hdev,
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break;
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default:
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dev_warn(hdev->dev, "Undefined FW component: %d\n", fwc);
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return;
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return -EIO;
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}
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ver_off &= ~((u32)SRAM_BASE_ADDR);
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@ -2373,7 +2373,11 @@ static void goya_read_device_fw_version(struct hl_device *hdev,
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dev_err(hdev->dev, "%s version offset (0x%x) is above SRAM\n",
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name, ver_off);
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strcpy(dest, "unavailable");
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return -EIO;
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}
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return 0;
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}
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static int goya_init_cpu(struct hl_device *hdev)
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@ -2644,12 +2648,14 @@ static void goya_hw_fini(struct hl_device *hdev, bool hard_reset)
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WREG32(mmPSOC_GLOBAL_CONF_SW_BTM_FSM,
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0xA << PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_SHIFT);
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goya->hw_cap_initialized &= ~(HW_CAP_CPU | HW_CAP_CPU_Q |
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HW_CAP_DDR_0 | HW_CAP_DDR_1 |
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HW_CAP_DMA | HW_CAP_MME |
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HW_CAP_MMU | HW_CAP_TPC_MBIST |
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HW_CAP_GOLDEN | HW_CAP_TPC);
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memset(goya->events_stat, 0, sizeof(goya->events_stat));
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if (goya) {
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goya->hw_cap_initialized &= ~(HW_CAP_CPU | HW_CAP_CPU_Q |
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HW_CAP_DDR_0 | HW_CAP_DDR_1 |
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HW_CAP_DMA | HW_CAP_MME |
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HW_CAP_MMU | HW_CAP_TPC_MBIST |
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HW_CAP_GOLDEN | HW_CAP_TPC);
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memset(goya->events_stat, 0, sizeof(goya->events_stat));
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}
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}
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int goya_suspend(struct hl_device *hdev)
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