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ARM: dts: rockchip: add watchdog node 

This adds the Designware compatible watchdog found on RK3xxx Cortex-A9 SoCs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Heiko Stuebner 2014-07-30 10:16:17 +02:00
parent 23c93bc92c
commit eb2b9d47dd
5 changed files with 24 additions and 0 deletions
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4
arch/arm/boot/dts/rk3066a-bqcurie2.dts
View File

@ -188,3 +188,7 @@ &uart2 {
&uart3 {
status = "okay";
};
&wdt {
status = "okay";
};

4
arch/arm/boot/dts/rk3066a.dtsi
View File

@ -425,3 +425,7 @@ &uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_xfer>;
};
&wdt {
compatible = "rockchip,rk3066-wdt", "snps,dw-wdt";
};

4
arch/arm/boot/dts/rk3188-radxarock.dts
View File

@ -221,3 +221,7 @@ &uart2 {
&uart3 {
status = "okay";
};
&wdt {
status = "okay";
};

4
arch/arm/boot/dts/rk3188.dtsi
View File

@ -400,3 +400,7 @@ &uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_xfer>;
};
&wdt {
compatible = "rockchip,rk3188-wdt", "snps,dw-wdt";
};

8
arch/arm/boot/dts/rk3xxx.dtsi
View File

@ -174,6 +174,14 @@ pwm1: pwm@20030010 {
status = "disabled";
};
wdt: watchdog@2004c000 {
compatible = "snps,dw-wdt";
reg = <0x2004c000 0x100>;
clocks = <&cru PCLK_WDT>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pwm2: pwm@20050020 {
compatible = "rockchip,rk2928-pwm";
reg = <0x20050020 0x10>;