Revert "usb: renesas_usbhs: set the mode by using extcon state for non-otg channel"

This reverts commit cd14247d5c.

R-Car D3 can use OTG mode in fact. So, the commit doesn't need anymore.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Yoshihiro Shimoda 2018-09-21 21:26:29 +09:00 committed by Greg Kroah-Hartman
parent 91b20c5a5b
commit eb757fff08
1 changed files with 1 additions and 14 deletions

View File

@ -27,7 +27,6 @@
* Remarks: bit[31:11] and bit[9:6] should be 0 * Remarks: bit[31:11] and bit[9:6] should be 0
*/ */
#define UGCTRL2_RESERVED_3 0x00000001 /* bit[3:0] should be B'0001 */ #define UGCTRL2_RESERVED_3 0x00000001 /* bit[3:0] should be B'0001 */
#define UGCTRL2_USB0SEL_EHCI 0x00000010
#define UGCTRL2_USB0SEL_HSUSB 0x00000020 #define UGCTRL2_USB0SEL_HSUSB 0x00000020
#define UGCTRL2_USB0SEL_OTG 0x00000030 #define UGCTRL2_USB0SEL_OTG 0x00000030
#define UGCTRL2_VBUSSEL 0x00000400 #define UGCTRL2_VBUSSEL 0x00000400
@ -50,14 +49,6 @@ static void usbhs_rcar3_set_ugctrl2(struct usbhs_priv *priv, u32 val)
usbhs_write32(priv, UGCTRL2, val | UGCTRL2_RESERVED_3); usbhs_write32(priv, UGCTRL2, val | UGCTRL2_RESERVED_3);
} }
static void usbhs_rcar3_set_usbsel(struct usbhs_priv *priv, bool ehci)
{
if (ehci)
usbhs_rcar3_set_ugctrl2(priv, UGCTRL2_USB0SEL_EHCI);
else
usbhs_rcar3_set_ugctrl2(priv, UGCTRL2_USB0SEL_HSUSB);
}
static int usbhs_rcar3_power_ctrl(struct platform_device *pdev, static int usbhs_rcar3_power_ctrl(struct platform_device *pdev,
void __iomem *base, int enable) void __iomem *base, int enable)
{ {
@ -83,14 +74,10 @@ static int usbhs_rcar3_power_and_pll_ctrl(struct platform_device *pdev,
struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev); struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
u32 val; u32 val;
int timeout = 1000; int timeout = 1000;
bool is_host = false;
if (enable) { if (enable) {
usbhs_write32(priv, UGCTRL, 0); /* release PLLRESET */ usbhs_write32(priv, UGCTRL, 0); /* release PLLRESET */
if (priv->edev) usbhs_rcar3_set_ugctrl2(priv, UGCTRL2_USB0SEL_HSUSB);
is_host = extcon_get_state(priv->edev, EXTCON_USB_HOST);
usbhs_rcar3_set_usbsel(priv, is_host);
usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM); usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM);
do { do {