mirror of https://gitee.com/openkylin/linux.git
arm64: dts: mt8173: split usb SuperSpeed port into two ports
split the old SuperSpeed port node into a HighSpeed one and a new SuperSpeed one. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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@ -731,8 +731,9 @@ ssusb: usb@11271000 {
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<0 0x11280700 0 0x0100>;
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reg-names = "mac", "ippc";
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
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phys = <&phy_port0 PHY_TYPE_USB3>,
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<&phy_port1 PHY_TYPE_USB2>;
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phys = <&u2port0 PHY_TYPE_USB2>,
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<&u3port0 PHY_TYPE_USB3>,
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<&u2port1 PHY_TYPE_USB2>;
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power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
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clocks = <&topckgen CLK_TOP_USB30_SEL>,
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<&clk26m>,
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@ -770,14 +771,20 @@ u3phy: usb-phy@11290000 {
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ranges;
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status = "okay";
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phy_port0: port@11290800 {
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reg = <0 0x11290800 0 0x800>;
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u2port0: usb-phy@11290800 {
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reg = <0 0x11290800 0 0x100>;
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#phy-cells = <1>;
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status = "okay";
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};
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phy_port1: port@11291000 {
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reg = <0 0x11291000 0 0x800>;
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u3port0: usb-phy@11290900 {
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reg = <0 0x11290900 0 0x700>;
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#phy-cells = <1>;
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status = "okay";
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};
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u2port1: usb-phy@11291000 {
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reg = <0 0x11291000 0 0x100>;
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#phy-cells = <1>;
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status = "okay";
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};
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