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arm64: dts: mt8173: split usb SuperSpeed port into two ports 

split the old SuperSpeed port node into a HighSpeed one and a new
SuperSpeed one.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
chunfeng.yun@mediatek.com 2017-03-31 15:35:33 +08:00 committed by Matthias Brugger
parent 2ea659a9ef
commit ebf61c63f8
1 changed files with 13 additions and 6 deletions
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19
arch/arm64/boot/dts/mediatek/mt8173.dtsi
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@ -731,8 +731,9 @@ ssusb: usb@11271000 {
<0 0x11280700 0 0x0100>; <0 0x11280700 0 0x0100>;
reg-names = "mac", "ippc"; reg-names = "mac", "ippc";
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
phys = <&phy_port0 PHY_TYPE_USB3>, phys = <&u2port0 PHY_TYPE_USB2>,
<&phy_port1 PHY_TYPE_USB2>; <&u3port0 PHY_TYPE_USB3>,
<&u2port1 PHY_TYPE_USB2>;
power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
clocks = <&topckgen CLK_TOP_USB30_SEL>, clocks = <&topckgen CLK_TOP_USB30_SEL>,
<&clk26m>, <&clk26m>,
@ -770,14 +771,20 @@ u3phy: usb-phy@11290000 {
ranges; ranges;
status = "okay"; status = "okay";
phy_port0: port@11290800 { u2port0: usb-phy@11290800 {
reg = <0 0x11290800 0 0x800>; reg = <0 0x11290800 0 0x100>;
#phy-cells = <1>; #phy-cells = <1>;
status = "okay"; status = "okay";
}; };
phy_port1: port@11291000 { u3port0: usb-phy@11290900 {
reg = <0 0x11291000 0 0x800>; reg = <0 0x11290900 0 0x700>;
#phy-cells = <1>;
status = "okay";
};
u2port1: usb-phy@11291000 {
reg = <0 0x11291000 0 0x100>;
#phy-cells = <1>; #phy-cells = <1>;
status = "okay"; status = "okay";
}; };